1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dl
2、a.mil/ Original date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA TITLE MICROCIRCUIT, LINEAR, WIDEBAND, LOW DISTORTION, DIFFERENTIAL AMPLIFIER, MONOLITHIC SILICON 13-07-01 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/13610 REV PAGE 1 OF 17 AMSC N/A 5962-V048-13 Provided b
3、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13610 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance wideband, low distortion, di
4、fferential amplifier microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the en
5、gineering documentation: V62/13610 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 THS4500-EP Wideband, low distortion, differential amplifier 1.2.2 Case outline(s). The case outline(s) are
6、 as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 MO-187-AA-T Plastic small outline with thermal pad 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder d
7、ip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13610 REV PAGE 3 1.3 Absolute maximum ratings. 1/
8、 Supply voltage range (VS) 16.5 V Input voltage (VIN) VSOutput current (IOUT) . 150 mA 2/ Differential input voltage (VID) 4 V Maximum junction temperature range (TJ) . +150C 3/ Storage temperature range (TSTG) -65C to +150C Lead temperature, 1.6 mm (1/16 inch) from case for 10 seconds +300C Electro
9、static discharge (ESD): Human body model (HBM) . 4,000 V Charge device model (CDM) 1,000 V Machine model (MM) . 100 V 1.4 Recommended operating conditions. 4/ Supply voltage (VS) : Dual supply 5 V nominal and 7.5 V maximum Single supply 5 V minimum and 15 V maximum Operating junction temperature ran
10、ge (TJ) -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is no
11、t implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ This device may incorporate a thermal pad on the underside of the chip. This acts as a heat sink and must be connected to a thermally dissipative plane for proper power dissipation. Failur
12、e to do so, may result in exceeding the maximum junction temperature which could permanently damage the device. 3/ The absolute maximum temperature under any condition is limited by the constraints of the silicon process. 4/ Use of this product beyond the manufacturers design rules or stated paramet
13、ers is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDE
14、NT NO. 16236 DWG NO. V62/13610 REV PAGE 4 1.5 Thermal characteristics. Thermal metric Symbol Case X Unit Thermal resistance, junction-to-ambient 5/ JA63.1 C/W Thermal resistance, junction-to-case (top) 6/ JC(TOP)46.2 C/W Thermal resistance, junction-to-board 7/ JB33.9 C/W Characterization parameter,
15、 junction-to-top 8/ JT1.9 C/W Characterization parameter, junction-to-board 9/ JB33.6 C/W Thermal resistance, junction-to-case (bottom) 10/ JC(BOTTOM)11.9 C/W 5/ The thermal resistance, junction-to-ambient under natural convection is obtained in a simulation on a JEDEC standard, high-K board, as spe
16、cified in JESD51-7, in an environment described in JESD51-2a. 6/ The thermal resistance, junction-to-case (top) is obtained by simulating a cold plate test on the package top. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. 7/ The therma
17、l resistance, junction-to-board is obtained by simulating in an environment with a ring cold plate fixture to control the printed circuit board (PCB) temperature, as described in JESD51-8. 8/ Characterization parameter, junction-to-top (JT) estimates the junction temperature of a device in a real sy
18、stem and is extracted from the simulation data for obtaining JA, using a procedure described in JESD51-2a (sections 6 and 7). 9/ Characterization parameter, junction-to-board (JB) estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining
19、JA, using a procedure described in JESD51-2a (sections 6 and 7). 10/ The thermal resistance, junction-to-case (bottom) is obtained by simulating a cold plate test on the exposed thermal pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88
20、. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13610 REV PAGE 5 2. APPLICABLE DOCUMENTS AMERICAN NATIONAL STANDARDS INSTITUTE ANSI SEMI STANDARD G30-88 - Test Method for
21、Junction-to-Case Thermal Resistance Measurements for Ceramic Packages (Applications for copies should be addressed to the American National Standards Institute, Semiconductor Equipment and Materials International, 1819 L Street, NW, 6 th floor, Washington, DC 20036 or online at http:/www.ansi.org) J
22、EDEC Solid State Technology Association EIA/JESD 51-2a - Integrated Circuits Thermal Test Method Environment Conditions Natural Convection (Still Air) EIA/JESD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages EIA/JESD 51-8 - Integrated Circuits Thermal Test Met
23、hod Environment Conditions Junction-to-Board JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS
24、 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufa
25、cturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design
26、, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. Provided by IHSNot for ResaleNo reproduction or networking
27、permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13610 REV PAGE 6 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/ VS= 5 V unless otherwise specifiedTemperature, TJ Device type Limits Unit Min Max AC char
28、acteristics. Small signal bandwidth SSBW G = +1, PIN= -20 dBm, RF= 392 +25C 01 370 typical MHz G = +2, PIN= -30 dBm, RF= 1 k 175 typical G = +5, PIN= -30 dBm, RF= 2.4 k 70 typical G = +10, PIN= -30 dBm, RF= 5.1 k 30 typical Gain bandwidth product GBWP G +10 +25C 01 300 typical MHz Bandwidth for 0.1
29、dB flatness BW PIN = -20 dBm +25C 01 150 typical MHz Large signal bandwidth LSBW VP= 2 V +25C 01 220 typical MHz Slew rate SR 4 VPPstep +25C 01 2800 typical V/s Rise time tr2 VPPstep +25C 01 0.4 typical ns Fall time tf2 VPPstep +25C 01 0.5 typical ns Settling time tsTo 0.01%, VO= 4 VPP+25C 01 8.3 ty
30、pical ns To 0.1%, VO= 4 VPP6.3 typical Harmonic distortion G = +1, VO= 2 VPP+25C Second harmonic f = 8 MHz +25C 01 -82 typical dBc f = 30 MHz -71 typical Third harmonic f = 8 MHz +25C 01 -97 typical dBc f = 30 MHz -74 typical Third order intermodulation distortion VO= 2 VPP, fC= 30 MHz, RF= 392 , 20
31、0 kHz tone spacing +25C 01 -90 typical dBc Third order output intercept point fC= 30 MHz, RF= 392 , referenced to 50 +25C 01 49 typical dBm See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS,
32、 OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13610 REV PAGE 7 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/ VS= 5 V unless otherwise specifiedTemperature, TJ Device type Limits Unit Min Max AC characteristics continued. Input voltage noise f 1 MHz +25C 01 7
33、 typical nV / Hz Input current noise f 100 kHz +25C 01 1.7 typical pA / Hz Overdrive recovery time Overdrive = 5.5 V +25C 01 60 typical ns DC performance characteristics. Open loop voltage gain AVOL-55C to +125C 01 49 dB Input offset voltage VIO-55C to +125C 01 -11 6 mV Average offset voltage drift
34、VIO-55C to +125C 01 10 typical V/ C Input bias current IIB-55C to +125C 01 6.6 A Average bias current drift IIB-55C to +125C 01 10 typical nA/ C Input offset current IIO-55C to +125C 01 2 A Average offset current drift IIO-55C to +125C 01 40 typical nA/ C Input characteristics Common mode input rang
35、e VCMIR-55C to +125C 01 -5.1 2 V Common mode rejection ratio CMRR -55C to +125C 01 70 dB Input impedance ZIN3/ +25C 01 107|1 typical |pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OH
36、IO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13610 REV PAGE 8 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/ VS= 5 V unless otherwise specifiedTemperature, TJ Device type Limits Unit Min Max Output characteristics. Differential output voltage swing VODRL= 1 k -
37、55C to +125C 01 7.25 V Differential output current drive IODRL= 20 -55C to +125C 01 90 mA Output balance error PIN= -20 dBm, f = 100 kHz +25C 01 -58 typical dB Closed loop output impedance (single ended) f = 1 MHz +25C 01 0.1 typical Output common mode voltage control characteristics. Small signal b
38、andwidth SSBW RL= 400 +25C 01 180 typical MHz Slew rate SR 2 VPPstep +25C 01 92 typical V/s Minimum gain -55C to +125C 01 0.98 V/V Maximum gain -55C to +125C 01 1.08 V/V Common mode offset voltage VOCM-55C to +125C 01 -7.6 15 mV Input bias current IIBVOCM= 2.5 V -55C to +125C 01 170 A Input voltage
39、range VINR-55C to +125C 01 3.4 V Input impedance ZIN3/ +25C 01 25|1 typical k|pF Maximum default voltage VOCMleft floating -55C to +125C 01 0.10 V Minimum default voltage VOCMleft floating -55C to +125C 01 -0.10 V Power supply characteristics. Specified operating voltage -55C to +125C 01 7.5 V Maxim
40、um quiescent current -55C to +125C 01 40 mA Minimum quiescent current -55C to +125C 01 11 mA Power supply rejection PSRR -55C to +125C 01 70 dB See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUM
41、BUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13610 REV PAGE 9 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/ VS= 5 V unless otherwise specifiedTemperature, TJ Device type Limits Unit Min Max Power down characteristics. Enable voltage threshold Device ena
42、bled ON above 2.9 V -55C to +125C 01 -2.9 V Disable voltage threshold Device disabled OFF below 4.3 V -55C to +125C 01 -4.3 V Power down quiescent current -55C to +125C 01 1400 A Input bias current IIB-55C to +125C 01 260 A Input impedance ZIN3/ +25C 01 50|1 typical k|pF Turn on time delay ton+25C 0
43、1 1000 typical ns Turn off time delay toff+25C 01 800 typical ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13610 REV PAGE 10 TABLE I. El
44、ectrical performance characteristics. 1/ Test Symbol Conditions 2/ VS= 5 V unless otherwise specifiedTemperature, TJ Device type Limits Unit Min Max AC characteristics. Small signal bandwidth SSBW G = +1, PIN= -20 dBm, RF= 392 +25C 01 320 typical MHz G = +2, PIN= -30 dBm, RF= 1 k 160 typical G = +5,
45、 PIN= -30 dBm, RF= 2.4 k 60 typical G = +10, PIN= -30 dBm, RF= 5.1 k 30 typical Gain bandwidth product GBWP G +10 +25C 01 300 typical MHz Bandwidth for 0.1 dB flatness BW PIN = -20 dBm +25C 01 180 typical MHz Large signal bandwidth LSBW VP= 1 V +25C 01 200 typical MHz Slew rate SR 2 VPPstep +25C 01
46、1300 typical V/s Rise time tr2 VPPstep +25C 01 0.5 typical ns Fall time tf2 VPPstep +25C 01 0.6 typical ns Settling time tsTo 0.01%, VO= 2 VPP+25C 01 13.1 typical ns To 0.1%, VO= 2 VPP8.3 typical Harmonic distortion G = +1, VO= 2 VPPSecond harmonic f = 8 MHz +25C 01 -80 typical dBc f = 30 MHz -55 ty
47、pical Third harmonic f = 8 MHz +25C 01 -76 typical dBc f = 30 MHz -60 typical See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13610 REV PAGE 11 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/ VS= 5 V unless otherwise specifiedTemperature, TJ Device type Limits Unit Min Max
