1、 REVISIONSLTR DESCRIPTION DATE (YY-MM-DD) APPROVEDA Add device type 02 and case outline Y. Editorial changes throughout. - TVN 04-04-13 Thomas M. Hess B Update boilerplate paragraphs to current requirements. - PHN 12-04-10 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO:
2、DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Thanh V. Nguyen DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Original d
3、ate of drawing CHECKED BY Thanh V. Nguyen TITLE MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, OCTAL BUFFER AND LINE DRIVER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON YY-MM-DD 02-11-07 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/03607 REV B PAGE 1 OF 12 AMSC N/A 5962-V051-12 .Prov
4、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance octal buff
5、er and line driver with three-state outputs microcircuit, with an operating temperature range of -55C to +125C for device type 01 and -40C to +125C for device type 02. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing
6、establishes an administrative control number for identifying the item on the engineering documentation: V62/03607 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 74HC244-EP Octal buffer and
7、 line driver with three-state outputs 02 74HC244-EP Octal buffer and line driver with three-state outputs 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 20 MS-013 Plastic small-outline package Y 20 MO-153 Plastic small-out
8、line package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or
9、networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to 7.0 V Input clamp current (IIK) (VI 0 or VI VCC) . 20 mA 2/ Output clamp
10、 current (IOK) (VO 0 or VO VCC) . 20 mA 2/ Continuous output current (IO) (VO= 0 to VCC) 35 mA Continuous current through VCCor GND . 70 mA Storage temperature range (TSTG) . -65C to 150C Package thermal impedance (JA): 3/ X package . 58C/W Y package . 83C/W 1.4 Recommended operating conditions. 4/
11、Supply voltage range (VCC) . 2.0 V to 6.0 V Input voltage range (VI) . 0.0 V to VCC Output voltage range (VO) . 0.0 V to VCCMinimum high level input voltage (VIH): VCC= 2.0 V 1.5 V VCC= 4.5 V 3.15 V VCC= 6.0 V 4.2 V Minimum low level input voltage (VIL): VCC= 2.0 V, 4.5 V, and 6.0 V 0.0 V Maximum lo
12、w level input voltage (VIL): VCC= 2.0 V 0.5 V VCC= 4.5 V 1.35 V VCC= 6.0 V 1.8 V Minimum input transition rise or fall time (tt): VCC= 2.0 V, 4.5 V, and 6.0 V 0.0 ns Maximum input transition rise or fall time (tt): VCC= 2.0 V 1000 ns VCC= 4.5 V 500 ns VCC= 6.0 V 400 ns Operating free-air temperature
13、 range (TA): Device type 01 . -55C to +125C Device type 02 . -40C to +125C 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices JESD51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packag
14、es (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are st
15、ress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage
16、 ratings may be exceeded if the input and output current ratings are observed. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. 4/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor
17、 maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 4 3. REQUIREME
18、NTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the man
19、ufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimensions. The de
20、sign, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure
21、3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFEN
22、SE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCC Temperature, TADevice type Limits Unit Min Max High level output voltage VOH VI= VIHor VIL2/ IOH= -20 A 2.0 V 3/ All 1.9
23、 V 4.5 V 4.4 6.0 V 5.9 VI= VIHor VIL2/ IOH= -6 mA 4.5 V 25C 3.98 4/ 3.7 VI= VIHor VIL2/ IOH= -7.8 mA 6.0 V 25C 5.48 4/ 5.2 Low level output voltage VOL VI= VIHor VIL2/ IOL= 20 A 2.0 V 3/ All 0.1 V 4.5 V 0.1 6.0 V 0.1 VI= VIHor VIL2/ IOL= 6 mA 4.5 V 25C 0.26 4/ 0.4 VI= VIHor VIL2/ IOL= 7.8 mA 6.0 V 2
24、5C 0.26 4/ 0.4 Input current II VI= VCCor 0 V 6.0 V 25C All 0.1 A 4/ 1.0 Three-state output leakage current IOZ VI= VIHor VIL2/ VO= VCCor 0 V 6.0 V 25C All 0.5 A 4/ 10.0 Quiescent supply current ICC VI= VCCor 0 V IO= 0 A 6.0 V 25C All 8.0 A 4/ 160.0 Input capacitance CI 2.0 V to 6.0 V 3/ All 10 pF P
25、ower dissipation capacitance per buffer/driver CPD No load 25C All 35 typical pF Propagation delay time, A to Y tpd CL= 50 pF See figure 5 2.0 V 25C All 115 ns 4/ 170 4.5 V 25C 23 4/ 34 6.0 V 25C 20 4/ 29 CL= 150 pF See figure 5 2.0 V 25C 165 4/ 245 4.5 V 25C 33 4/ 49 6.0 V 25C 28 4/ 42 See footnote
26、s at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 6 TABLE I. Electrical performance characteristics - Continued. Test Symbol Cond
27、itions VCC Temperature, TADevice type Limits Unit Min Max Propagation delay time, output enable, OE to Y ten CL= 50 pF See figure 5 2.0 V 25C All 150 ns 4/ 225 4.5 V 25C 30 4/ 45 6.0 V 25C 26 4/ 38 CL= 150 pF See figure 5 2.0 V 25C 200 4/ 300 4.5 V 25C 40 4/ 60 6.0 V 25C 34 4/ 51 Propagation delay t
28、ime, output disable, OE to Y tdis CL= 50 pF See figure 5 2.0 V 25C All 150 ns 4/ 225 4.5 V 25C 30 4/ 45 6.0 V 25C 26 4/ 38 Output transition time tt CL= 50 pF See figure 5 2.0 V 25C All 60 ns 4/ 90 4.5 V 25C 12 4/ 18 6.0 V 25C 10 4/ 15 CL= 150 pF See figure 5 2.0 V 25C 210 4/ 315 4.5 V 25C 42 4/ 63
29、6.0 V 25C 36 4/ 53 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In
30、the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ The values to be used for VIHand VILshall be the VIHminimum and VILmaximum values listed in section 1.4 herein. 3/ TA= 25C, -55C to 125C for device type 01 ; TA= 25C, -40C to 125C for dev
31、ice type 02. 4/ TA= -55C to 125C for device type 01 ; TA= -40C to 125C for device type 02. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 7 Case
32、X Dimensions Symbol Inches Millimeters Symbol Inches Millimeters Min Max Min Max Min Max Min Max A .104 2.65 E .291 .299 7.39 7.59 A1 .004 .012 0.10 0.30 E1 .400 .419 10.15 10.65 b .014 .020 0.35 0.51 e .050 BSC 1.27 BSC c .010 NOM 0.25 NOM L .016 .050 0.40 1.27 D .500 .510 12.70 12.95 NOTES: 1. All
33、 linear dimensions are in inches (millimeters). 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed .006 inches (0.15 millimeters). 4. Fall within JEDEC MS-013. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo re
34、production or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 8 Case Y Dimensions Symbol Millimeters Symbol Millimeters Min Max Min Max A 1.20 E 4.30 4.50 A1 0.05 0.15 E1 6.20 6.60 b 0.19 0.30 e
35、 0.65 BSC c 0.15 NOM L 0.50 0.75 D 6.40 6.60 NOTES: 1. All linear dimensions are in millimeters. 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed 0.15 millimeters. 4. Fall within JEDEC MO-153. FIGURE 1. Case outlines
36、- Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 9 Each buffer/driver Inputs Output OE A Y L H H L L L H X Z H = High voltage level L
37、= Low voltage level Z = High impedance X = Dont care FIGURE 2. Truth table. FIGURE 3. Logic diagram. Device type All Case outline X and Y Terminal number Terminal symbol Terminal number Terminal symbol 1 1 OE 11 2A12 1A1 12 1Y4 3 2Y4 13 2A24 1A2 14 1Y3 5 2Y3 15 2A36 1A3 16 1Y2 7 2Y2 17 2A48 1A4 18 1
38、Y1 9 2Y1 192 OE 10 GND 20 VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 10 FIGURE 5. Test circuit and timing
39、waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 11 NOTES: 1. CLincludes probe and test-fixture capacitance. 2. Waveform 1 is for an out
40、put with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. Phase relationships between waveforms were chosen arbitrarily. All inp
41、ut pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50 , tr= 6 ns, tf= 6 ns. 4. The outputs are measured one at a time with one input transition per measurement. 5. tPLZand tPHZare the same as tdis; tPZLand tPZHare the same as ten; tPLHand tPHLare the same as tp
42、d. FIGURE 5. Test circuit and timing waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03607 REV B PAGE 12 4. VERIFICATION 4.1 Product assuran
43、ce requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices,
44、 as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and ar
45、e classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided.
46、6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part
47、number Top side marking V62/03607-01XE 01295 SN74HC244MDWREP HC244MEP V62/03607-02XE 01295 SN74HC244QDWREP SHC244EP V62/03607-02YE 01295 SN74HC244QPWREP SHC244EP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE co
48、de Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,
