1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Correct lead finish. - CFS 05-12-02 Thomas M. Hess B Update boilerplate paragraphs to current requirements. - PHN 11-07-22 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in
2、 accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TI
3、TLE MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-V ABT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS, MONOLITHIC SILICON YY-MM-DD 04-06-09 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04720 REV B PAGE 1 OF 12 AMSC N/A 5962-V063-11 Provided by IHSNot for ResaleNo reproduction
4、or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 3.3-V ABT 32-bit buffer/driver with 3-state outputs
5、 microcircuit, with an operating temperature range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentati
6、on: V62/04720 - 01 X A Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 SN74LVTH32244-EP 3.3-V ABT 32-bit buffer/driver with 3-state outputs 1.2.2 Case outlines. The case outlines are as specified he
7、rein. Outline letter Number of pins JEDEC PUB 95 Package style X 96 JEDEC MO-205 Plastic ball grid array 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold pla
8、teD PalladiumE Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage rang
9、e (VCC) . -0.5 V to +4.6 V Input voltage range (VI) . -0.5 V to 7 V 2/ Voltage range applied to any output in the high-impedance or power-off state (VO) . -0.5 V to 7 V 2/ Voltage range applied to any output in the high state (VO) -0.5 V to VCC+ 0.5 V 2/ Current into any output in the low state (IO)
10、 . 128 mA Current into any output in the high state (IO) . 64 mA 3/ Input clamp current (IIK) (VIVCC. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. 5/ Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a red
11、uction of overall device life. See figure 1 for additional information on thermal derating. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 4 1.4
12、Recommended operating conditions. 1/ Supply voltage range (VCC) . 2.7 V to 3.6 V Minimum high level input voltage (VIH) 2 V Maximum low level input voltage (VIL) . 0.8 V Maximum input voltage (VI) . 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH) . -32 mA Maximu
13、m low level output current (IOL) . 64 mA Maximum input transition rise or fall rate (t/v) (Outputs enabled) 10 ns/V Minimum power-up ramp rate (t/VCC) 200 s/V Operating free-air temperature range (TA) -40C to +85C 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95
14、Registered and Standard Outlines for Semiconductor Devices JEDEC STD 51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street,
15、Suite 240S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. T
16、he unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design,
17、 construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 2. 3.5.2 Truth table. The truth table shall be as shown in figure 3. 3.5.3 Logic diagram. The log
18、ic diagram shall be as shown in figure 4. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 5. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 6. 1/ All unused inputs of the device must be held at VCCor GND to
19、ensure proper device operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol
20、Conditions VCCTemperature, TADevice type Limits Unit Min Max Input clamp voltage VIKII= -18 mA 2.7 V 25C, -40C to 85C All -1.2 V High level output voltage VOHIOH= -100 A 2.7 V to 3.6 V VCC 0.2 V IOH= -8 mA 2.7 V 2.4 IOH= -32 mA 3 V 2 Low level output voltage VOLIOL= 100 A 2.7 V 0.2 V IOL= 24 mA 0.5
21、IOL= 16 mA 3 V 0.4 IOL= 32 mA 0.5 IOL= 64 mA 0.55 Input current IIVI= 5.5 V 0 V or 3.6 V 10 A Control inputs. VI= VCCor GND 3.6 V 1 Data inputs, VI= VCC1 Data inputs, VI= 0 V -5 Input/output power-off leakage current IoffVIor VO= 0 V to 4.5 V 0 V 100 A Input current (hold) II(hold)Data inputs, VI= 0
22、.8 V 3 V 75 AData inputs, VI= 2 V -75 Data inputs. VI= 0 V to 3.6 V 2/ 3.6 V 500 Off state output current high IOZHVO= 3 V 3.6 V 5 A Off state output current low IOZLVO= 0.5 V 3.6 V -5 A3-state output current power-up IOZPUVO= 0.5 V to 3 V OE = dont care 0 V to 1.5 V 100 A 3-state output current pow
23、er-down IOZPDVO= 0.5 V to 3 V OE = dont care 1.5 V to 0 V 100 AQuiescent supply current ICCOutputs high. VI= VCCor GND, IO= 0 A 3.6 V 0.38 mA Outputs low. VI= VCCor GND, IO= 0 A 10 Outputs disabled. VI= VCCor GND, IO= 0 A 0.38 Quiescent supply current delta ICC4/ One input at VCC 0.6 V, Other inputs
24、 at VCCor GND 3 V to 3.6 V 0.2 mA Input capacitance CiVI= 3 V or 0 V 3.3 V 25C 4 TYP pF Output capacitance CoVO= 3 V or 0 V 9 TYP pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMB
25、US, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Propagation delay time, A to Y tPLHSee figure 6. 2.7 V 25C, -40C to 85C All 3.7 ns 3.3 V 0.3 V
26、1.2 3.2 tPHL2.7 V 3.73.3 V 0.3 V 1.2 3.2 Propagation delay time, output enable, OE to Y tPZHSee figure 6. 2.7 V 5 ns 3.3 V 0.3 V 1.2 4 tPZL2.7 V 5 3.3 V 0.3 V 1.2 4 Propagation delay time, output disable, OE to Y tPHZ2.7 V 5 ns 3.3 V 0.3 V 2.2 4.5 tPLZ2.7 V 4.4 3.3 V 0.3 V 2 4.2 tsk(o)3.3 V 0.3 V 0.
27、5 ns 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of
28、 specific parametric testing, product performance is assured by characterization and/or design. 2/ This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. 3/ This is the increase in supply current for each input that i
29、s at the specified TTL voltage level, rather than VCCor GND. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 7 Case X NOTES: 1. This drawing is su
30、bject to change without notice. 2. Falls within JEDEC MO-205 variation CC. 3. All linear dimensions are shown in millimeters (inches). Inches equivalents are given for general information only. 4. This package is tin-lead (SnPb). FIGURE 2. Case outline. Provided by IHSNot for ResaleNo reproduction o
31、r networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 8 Case X Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.40 - 0.551 D1 4.00 NOM 0.157 NOM A
32、1 0.85 0.95 0.033 0.037 E 13.40 13.60 0.528 0.535 A2 0.35 0.45 0.014 0.018 E1 12.00 NOM 0.472 NOM b 0.45 0.55 0.018 0.022 e 0.80 NOM 0.031 NOM D 5.40 5.60 0.213 0.220 e1 0.40 NOM 0.016 NOM FIGURE 2. Case outline - Continued. (each 4-bit buffer/driver) Inputs Output OE A Y L L H H L X H L Z H = High
33、L = Low X = Immaterial Z = High-impedance state FIGURE 3. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 9 FIGURE 4. Logic diagram.
34、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 10 Device type 01 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol T
35、erminal number Terminal symbol Terminal number Terminal symbol A1 1Y2 E1 3Y2 J1 5Y2 N1 7Y2 A2 1Y1 E2 3Y1 J2 5Y1 N2 7Y1 A3 1OE E3 GND J3 5OE N3 GND A4 2OE E4 GND J4 6OE N4 GND A5 1A1 E5 3A1 J5 5A1 N5 7A1 A6 1A2 E6 3A2 J6 5A2 N6 7A2 B1 1Y4 F1 3Y4 K1 5Y4 P1 7Y4 B2 1Y3 F2 3Y3 K2 5Y3 P2 7Y3 B3 GND F3 1VC
36、CK3 GND P3 2VCCB4 GND F4 1VCCK4 GND P4 2VCCB5 1A3 F5 3A3 K5 5A3 P5 7A3 B6 1A4 F6 3A4 K6 5A4 P6 7A4 C1 2Y2 G1 4Y2 L1 6Y2 R1 8Y2 C2 2Y1 G2 4Y1 L2 6Y1 R2 8Y1 C3 1VCCG3 GND L3 2VCCR3 GND C4 1VCCG4 GND L4 2VCCR4 GND C5 2A1 G5 4A1 L5 6A1 R5 8A1 C6 2A2 G6 4A2 L6 6A2 R6 8A2 D1 2Y4 H1 4Y3 M1 6Y4 T1 8Y3 D2 2Y
37、3 H2 4Y4 M2 6Y3 T2 8Y4 D3 GND H3 4OE M3 GND T3 8OE D4 GND H4 3OE M4 GND T4 7OE D5 2A3 H5 4A4 M5 6A3 T5 8A4 D6 2A4 H6 4A3 M6 6A4 T6 8A3 FIGURE 5. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COL
38、UMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 11 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions
39、 such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50, tr 2.5 ns, tf 2.5 ns. 4. The outputs are measured one at a time with one input transition per measurement. FIGURE 6. Timi
40、ng waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04720 REV B PAGE 12 4. VERIFICATION 4.1 Product assurance requirements. The manufact
41、urer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATIO
42、N FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1
43、minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of su
44、pply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/0
45、4720-01XA 01295 CLVTH32244IGKEREP L244EP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
