1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Change the unit for VICand VIDin section 1.4. Correct the name for terminal connection 1 and 2. Update boilerplate paragraphs to current requirements. - PHN 12-07-23 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND M
2、ARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Phu H. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of
3、 drawing YY-MM-DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, LOW VOLTAGE HIGH SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 15 kV ESD PROTECTION, MONOLITHIC SILICON 08-12-10 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/09602 REV A PAGE 1 OF 12 AMSC N/A 5962-V082-1
4、2 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance low
5、voltage high speed quadruple differential line receiver with 15 kV ESD protection microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an adm
6、inistrative control number for identifying the item on the engineering documentation: V62/09602 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 AM26LV32E-EP Low voltage high speed quadruple
7、 differential line receiver with 15 kV ESD protection 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 16 MS-012 Plastic small outline package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead fin
8、ishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBU
9、S, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) . -0.5 V to +6.0 V 3/ Input voltage range (VI): A or B inputs . -14.0 V to + 14.0 V Enable inputs -0.5 V to + 6.0 V Differential input voltage -14.0 V to +14.0 V 4/ Outpu
10、t voltage range (VO) . -0.5 V to +6.0 V Maximum input clamp current (IIK) (VI 0) -20 mA Maximum output clamp current (IOK) (VO 0) . -20 mA Maximum output current (IO) 20 mA Package thermal impedance (JA) . 73C/W 5/ 6/ Operating virtual junction temperature range (TJ) +150C Storage temperature range
11、-65C to +150C Operating free-air temperature range (TA) . -55C to +125C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 3.0 V to 3.6 Enable high level input voltage, (VIH) . 2.0 V to 5.5 V Enable low level input voltage, (VIL) . 0.0 V to 0.8 Common mode input voltage (VIC) . -7.0
12、V to +7.0 V Differential input voltage, (VID) -7.0 V to +7.0 V Maximum high level output current (IOH) -5 mA Maximum low level output current (IOL) +5 mA Operating free-air temperature range (TA) . -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent dama
13、ge to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2
14、/ This device is designed to meet TIA/EIA-422-B. 3/ All voltage values, except differential input voltage are with respect to network GND. 4/ Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input. 5/ Maximum power dissipation is a function
15、 of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD= (TJ(max) TA) / JA. Selecting the maximum of +150C can affect reliability. 6/ The package thermal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for ResaleNo reproduc
16、tion or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 4 2. APPLICABLE DOCUMENTS ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices. J
17、ESD 51-7 High effective-thermal-conductivity test board for leaded surface- mount packages. TIA/EIA-422-B Electrical Characteristics of Balanced Voltage Digital Interface Circuits. (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, V
18、A 22201-3834 or online at http:/www.jedec.org or http:/www.eia.org) INTERNATIONAL ELECTROTECHNICAL COMMISSION (IEC) IEC 61000-4-2 Electromagnetic compatibility (EMC) Part 4-2: Testing and measurement techniques Electrostatic discharge immunity test. (Applications for copies should be addressed to th
19、e IEC Central Office, 3 Rue de Varembe, P.O. Box 131, CH 1211 GENEVA 20, Switzerland or online at http:/www.iec.ch). 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code,
20、or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical perfor
21、mance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Termi
22、nal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Function table. The function table shall be as shown in figure 3. 3.5.4 Logic diagram. The logic diagram shall be as shown in figure 4. 3.5.5 Test circuits and voltage waveforms. The test circuits and voltage waveforms sh
23、all be as shown in figures 5-7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol
24、Conditions 2/ Limits Unit Min Max Positive going input threshold voltage, differential input VIT+0. 2 V Negative going input threshold voltage, differential input VIT-0.2 Input hysteresis (VIT+ - VIT-)VhysVCC= 3.3 V, TA= 25C 35 TYP mV Input clamp voltage, G and G VIKII= -18 mA -1.5 V High level outp
25、ut voltage VOHVID= 200 mV, IOH= -5 mA 2.4 VID= 200 mV, IOH= -100 A VCC 0.1 Low level output voltage VOLVID= -200 mV, IOH= 5 mA 0.5 VID= -200 mV, IOH= 100 A 0.1 High impedance state output current IOZVo= VCCor GND 150 A Output current with power off IoffVCC= 0 V, VO=0 or 5.5 V 100 Line input current
26、IIOther input at 0 V VI= 10 V 1.5 mA VI= -10 V -2.5 Enable input current, G and G IIVI= VCCor GND 1 A Input resistance VIC= -7 to 7 V, Other input at 0 V 4 k Supply current (total package) ICCG, G = VCCor GND, No load, Line inputs open 17 mA Power dissipation capacitance 3/ CpdOne channel 150 TYP pF
27、 Switching characteristics Propagation delay time, low to high level output tPLHSee figure 5 8 26 ns Propagation delay time, high to low level output tPHL8 26 Transition time (tr or tf) ttVCC= 3.3 V, TA= 25C, See figure 5 5 TYP Output enable time to high level tPZHSee figure 6 40 Output enable time
28、to low level tPZLSee figure 7 40 Output disable time from high level tPHZSee figure 6 40 Output disable time from low level tPLZSee figure 7 40 Pulse skew tsk(p)See figure 5 4/ 6 Pulse skew tsk(o)See figure 5 5/ 6 Pulse skew (device to device) tsk(pp)See figure 5 6/ 9 Maximum operating frequency fma
29、xVCC= 3.3 V, TA= 25C , See figure 5 32 TYP MHz ESD protection Driver output HBM 15 kV IEC6100-4-2, Air gap discharge 15 IEC6100-4-2, Constant discharge 8 See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CEN
30、TER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature ra
31、nge. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Over recommended ranges of supply voltage and operating f
32、ree air temperature (unless otherwise noted). 3/ Cpddetermined the no load dynamic current consumption: IS= Cpdx VCC x f + ICC. 4/ tsk(p) is |tPLH tPHL| .of each channel of same device. 5/ tsk(o) is the maximum difference in propagation delay times between any two channels of same device switching i
33、n the same direction. 6/ tsk(pp) is the maximum difference in propagation delay times between any two channels of any two devices switching in the same direction. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBU
34、S, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 7 Case X Symbols Inches Millimeters Symbols Inches Millimeters Min Max Min Max Min Max Min Max A - 0.069 - 1.75 E 0.150 0.157 3.80 4.00 A1 0.004 0.010 0.10 0.25 E1 0.228 0.244 5.80 6.20 b 0.012 0.020 0.31 0.51 e 0.050 BSC 1.27 BSC c 0.
35、007 0.010 0.17 0.25 L 0.016 0.050 0.40 1.27 D 0.386 0.394 9.80 10.00 NOTES: 1. All linear dimensions are in inches (millimeters). 2. Body length does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 inch (0.15 mm) per end. 3. Body width
36、 does not include interlead flash. Interlead flash shall not exceed .017 inch (0.43 mm) per side. 4. Falls within JEDEC MS-012 variation AC. FIGURE 1. Case outlines - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, C
37、OLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 8 Terminal number Terminal symbol Terminal number Terminal symbol 1 1B 9 3B 2 1A 10 3A 3 1Y 11 3Y 4 G 12 G 5 2Y 13 4Y 6 2A 14 4A 7 2B 15 4B 8 GND 16 VCCFIGURE 2. Terminal connections. (Each Receiver) Differential Input E
38、nables Output G G VID 0.2 v H X H X L H -02 V VID 0.2 V H X ? X L ? VID -0.2 V H X L X L L Open, Shorted, or terminated H X H X L H X L H Z FIGURE 3. Function table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLU
39、MBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 9 FIGURE 4. Logic diagram. NOTES: 1. CL include probe and jig capacitance. 2. The input pulse is supplied by generators having the following characteristics: PRR 32 MHz, duty cycle = 50%, tr= tf 2 ns. 3. To test active low enable G
40、, ground G and apply an inverted waveform G . FIGURE 5. Test circuit and voltage waveforms, tPLHand tPHLProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A
41、 PAGE 10 NOTES: 1. CL include probe and jig capacitance. 2. The input pulse is supplied by generators having the following characteristics: PRR 32 MHz, duty cycle = 50%, tr= tf 2 ns. 3. To test active low enable G , ground G and apply an inverted waveform G . FIGURE 6. Test circuit and voltage wavef
42、orms, tPZHand tPHZProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 11 NOTES: 1. CL include probe and jig capacitance. 2. The input pulse is supplie
43、d by generators having the following characteristics: PRR = 10 MHz, 50 % duty cycle, tr= tf 2 ns. 3. To test the active low enable G , ground G and apply an inverted waveform G . FIGURE 7. Test circuit and voltage waveforms, tPZLand tPLZProvided by IHSNot for ResaleNo reproduction or networking perm
44、itted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 12 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their
45、internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accor
46、dance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characte
47、ristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http:/www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ Device manufac
