1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to the latest requirements. Made correction to paragraph 1.3. -sld 07-04-13 Robert M. Heber B Added footnote 1 to table II, under group C end-point electricals. Updated drawing paragraphs. -sld 12-12-10 Charles F. Saffle REV SHEET
2、REV B B SHEET 15 16 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary Zahn DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones THIS DRAWING IS
3、AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, LINEAR, PHASE SHIFT RESONANT CONTROLLER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 02-01-31 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-02506 SHEET 1 OF 16 DSCC FORM 2233
4、APR 97 5962-E120-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-02506 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing docume
5、nts five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2
6、 PIN. The PIN shall be as shown in the following example: 5962 - 02506 01 H X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance
7、 (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: UVLO UVLO Device type 1/ Generic
8、number Circuit function Turn-on Turn-off 01 52447 Phase shift resonant controller 10.75 V 9.25 V 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML C
9、ertification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military qualit
10、y class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufactu
11、rer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C, and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) m
12、ust be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified
13、 flow. This product may have a limited temperature range. 1/ Device type may be similar to the device type on Standard Microcircuit Drawing (SMD) 5962-94555. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-02
14、506 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CQCC1-N28B 28 Square leadless chip carrier w
15、ith thermal pads 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltage (VC, VIN) . 20 V Output current, source or sink: DC. 0.5 A Pulse (0.5 s) 3 A Analog I/O pins . -0.3 V to 5.3 V Operating junction temperature (TJ) . 150C Storag
16、e temperature range -65C to +150C Lead temperature (soldering, 10 seconds) . 300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) 65C/W 1.4 Recommended operating conditions. Supply voltage (VC, VIN) 12 V Ambient operating temperature range (T
17、A) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicita
18、tion or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBO
19、OKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-509
20、4.) 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUI
21、T DRAWING SIZE A 5962-02506 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this
22、document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-385
23、34 shall include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize the tests and inspections herein, however the performance requirements a
24、s defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and physical d
25、imensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Logic diagram(s). The logic diagram(s) shall be as specified
26、 on figure 2. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temp
27、erature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be
28、 marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables format)
29、from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the m
30、anufacturer and be made available to the preparing activity (DLA Land and Maritime -VA) upon request. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawing. The certificate of compliance (original copy) submitted to DLA La
31、nd and Maritime -VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of microcircuits delivered to this drawing. Provid
32、ed by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-02506 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Cond
33、itions -55C TA+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Supply current section Input current startup IIS VIN= 8 V, VC= 20 V, RSLOPE= open, IDELAY= 0 mA 1,2,3 01 600 A Output switch supply current startup IIS VIN= 8 V, VC= 20 V, RSLOPE= open, IDELAY= 0 mA 1,2,
34、3 01 100 A Input supply current IIN 1,2,3 01 40 mA Output switch supply current IC1,2,3 01 30 mA Voltage reference section Output voltage VOUT TA= +25C 1 01 4.92 5.08 V Load regulation VLDVREF= -10 mA 1,2,3 01 20 mV Line regulation VLN+VIN= 11 V to 20 V 1,2,3 01 10 mV Total variation VT Line, load,
35、temperature 1,2,3 01 5.1 V Error amplifier section Offset voltage VIO 1,2,3 01 15 mV Input bias current IIB 1,2,3 01 3 A Open loop voltage gain AVOL VCOMP= 1 V to 4 V 4,5,6 01 60 dB Common mode rejection ratio CMRR VCM= 1.5 V to 5.5 V 4,5,6 01 75 dB Power supply rejection ratio PSRR VIN= 11 V to 20
36、V 4,5,6 01 85 dB Output sink current ISIVCOMP= 1 V 1,2,3 01 1 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-02506 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION L
37、EVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TA+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Error amplifier section - Continued. Output source current ISOVCOMP= 4 V 1,2,3 01 -0.5 mA
38、 Output voltage, high VOH ICOMP= -0.5 mA 1,2,3 01 4 5 V Output voltage, low VOLICOMP= 1 mA 1,2,3 01 0 1 V Unity gain bandwidth 3/ UGBW 4,5,6 01 5 MHz Slew rate 3/ SR 4,5,6 01 6 V/s Pulse width modulator section Zero phase shift voltage VZPS 4/ 1,2,3 01 0.55 V Pulse width modulator 5/ phase shift PS
39、VCOMP (ramp peak + ramp offset) 4,5,6 01 98 102 % VCOMP (zero phase shift voltage) 0 2 Output skew 5/ tOS VCOMP 1 V 9,10,11 01 20 ns Ramp to output delay tOD9,10,11 01 125 ns Oscillator section Initial accuracy IA TA= +25C 4 01 0.85 1.15 MHz Voltage stability VS VIN = 11 V to 20 V 4,5,6 01 2 % Total
40、 variation VT Line, temeprature 1,2,3 01 0.80 1.20 MHz Clock output pulse width tCLKORCLK/SYNC= 3.9 k 4,5,6 01 100 ns Maximum frequency fMAXRFSET= 5 k 4,5,6 01 2 MHz See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAND
41、ARD MICROCIRCUIT DRAWING SIZE A 5962-02506 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits
42、Unit Min Max Ramp generator / slope compensation section Minimum ramp current IRMIN ISLOPE= 10 A, VFSET= VREF 1,2,3 01 -14 Maximum ramp current IRMAX ISLOPE= 1 mA, VFSET= VREF 1,2,3 01 -0.8 mA Ramp peak, clamping level voltage VCLRFSET= 100 k 1,2,3 01 3.8 V Currnet limit section Input bias current I
43、IB C+C/S= 3 V 1,2,3 01 5 A Threshold voltage VTH 1,2,3 01 2.4 2.6 V Delay to output tDO 9,10,11 01 150 ns SOFT-START / reset delay section Charge current ICH VS-S= 0.5 V 1,2,3 01 -20 -3 A Discharge current IDCH VS-S= 1 V 1,2,3 01 120 A Restart threshold voltage VRTH 1,2,3 01 4.3 V OUTPUT drivers sec
44、tion Output low level voltage VOL IOUT= 50 mA 1,2,3 01 0.4 V Output high level voltage VOH IOUT= -50 mA 1,2,3 01 2.5 V DELAY SET section DELAY SET voltage VDS IDELAY= -500 A 1,2,3 01 2.3 2.6 V DELAY time tD IDELAY= -250 A 9,10,11 01 150 600 ns See footnotes at end of table. Provided by IHSNot for Re
45、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-02506 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. 1/ Unless otherwise spe
46、cified, VS= +VIN= 12 V, frequency set resistance RFSET= 12 k, frequency set capacitance CFSET = 330 pF, slope resistance RSLOPE= 12 k, ramp capacitance CRAMP= 200 pF, DELAY SET capacitance CDS A-B= CDS C-D= 0.01 F, DELAY SET current IDS A-B= IDS C-D= -500 A. 2/ The algebraic convention, whereby the
47、most negative value is a minimum and the most positive is a maximum, is used in this table. Negative current shall be defined as conventional current flow out of a device terminal. 3/ Not production tested. 4/ Zero phase shift voltage has a temperature coefficient of about -2 mV/C. 5/ Phase shift pe
48、rcentage (0% = 0, 100% = 180) is defined as: = (200/T) %. is the phase shift, and and T are defined in figure 3. At 0% phase shift, is the output skew. 6/ Delay time can be programmed via resistors from the delay set pins to ground. Delay time = (62.5 x 10-12) seconds/ IDELAY. IDELAY= delay set voltage/RDELAY. The recommended range for IDELAYis 25 A IDELAY 1 mA. Provided by IHSNot for ResaleNo repr
