1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Remove vendor CAGE 18324. Correction on vendor CAGE 01295 part notation. Convert to Military Drawing format. Editorial changes throughout. Add LCC package. Remove vendor CAGE 27014. 87-06-19 N. A. Hauck F Add MIL-M-38510/ number for LCC package.
2、Add QPL inactive label to front page. Change code ident. no. from 14933 to 67268. Editorial changes throughout. 87-08-11 N. A. Hauck G Changes in accordance with NOR 5962-R179-92. -tvn 92-04-29 Monica L. Poelking H Update to reflect latest changes in format and requirements. Editorial changes throug
3、hout. -les 03-01-30 Raymond Monnin J Correct marking paragraph. Editorial changes throughout. gap 05-12-07 Raymond Monnin CURRENT CAGE CODE 67268 THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV J J J J J J J J J J OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC
4、N/A PREPARED BY Joe A. Kerby DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N.A. Hauck MICROCIRCUIT, DIGITAL, LOW-POWER SCHOTTKY TTL, FLIP-FLOP, MO
5、NOLITHIC AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 76-03-23 SILICON AMSC N/A REVISION LEVEL J SIZE A CAGE CODE 14933 76013 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E451-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD
6、 MICROCIRCUIT DRAWING SIZE A 76013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, a
7、ppendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 76013 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Gen
8、eric number Circuit function 01 54LS76 Dual J-K negative edge-triggered flip-flop 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F
9、16 16 flat 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to +5.5 V dc Storage temperature range -65C to +150C Maximum
10、power dissipation (PD) 1/ 22 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input
11、 voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) 0.7 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA
12、RD MICROCIRCUIT DRAWING SIZE A 76013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawi
13、ng to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535
14、- Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawin
15、gs. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a
16、conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual ite
17、m requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transit
18、ional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirement
19、s herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction
20、, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on f
21、igure 1. 3.2.3 Truth table. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in tabl
22、e I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 4 DSCC FORM
23、 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsLimits Unit Min Max High level output voltage VOHVCC= 4.5 V, IOH= -400 A VIL= 0.7 V, VIH =2.0 V 1, 2, 3 2.5 V Low level output voltage VOLVCC= 4.5 V, IOL= 4
24、mA VIL= 0.7 V, VIH =2.0 V 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA, TC= +25C 1 -1.5 V High level input current IIH1VCC= 5.5 V, 1, 2, 3 20 A at J or K VIN= 2.7 V High level input current IIH21, 2, 3 80 A at clock High level input current IIH31, 2, 3 60 A at preset or clear High le
25、vel input current IIH4VCC= 5.5 V, 1, 2, 3 100 A at J or K VIN= 5.5 V High level input current IIH51, 2, 3 400 A at clock High level input current IIH61, 2, 3 300 A at preset or clear Low level input current IIL1VCC= 5.5 V, 1, 2, 3 -400 A at J or K VIN= 0.4 V Low level input current at IIL21, 2, 3 -8
26、00 A clock, preset, or clear Short circuit output current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 -6 -130 mA Supply current ICCVCC= 5.5 V 1, 2, 3 8 mA Functional tests See 4.3.1c 7 FMAX9 25 MHz VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 18 MHz 20 Maximum clock frequency 2/ CL= 50 pF 10% 10, 11 15 MHz
27、 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical per
28、formance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsLimits Unit Min Max tPHL9 30 ns VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 42 ns 35 Propagation delay time, high to low level, clock, clear, or preset to Q or Q 2/ CL= 50 pF 10% 10
29、, 11 49 ns tPLH9 20 CL= 15 pF 10% 10, 11 28 ns 25 Propagation delay time, low to high level, clock, clear, or preset to Q or Q CL= 50 pF 10% 10, 11 35 ns 1/ Not more than one output should be shorted at a time, and the duration of the short-circuit condition should not exceed one second. 2/ Propagat
30、ion delay time testing and maximum clock frequency testing may be performed using either CL= 15 pF or CL= 50 pF. However, the manufacturer must certify and guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. 3.4 Electrical test requirements. The electrical tes
31、t requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may
32、 also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify
33、 when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approv
34、ed source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits deli
35、vered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable requir
36、ed documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399
37、0 REVISION LEVEL J SHEET 6 DSCC FORM 2234 APR 97 Case outlines E, F 2 Terminal number Terminal symbols Terminal symbols 1 1 CLK N/C 2 1 PRE 1 CLK 3 1 CLR 1 PRE 4 1 J 1 CLR 5 VCC1 J 6 2 CLK N/C 7 2 PRE VCC8 2 CLR 2 CLK 9 2 J 2 PRE 10 2 Q 2 CLR 11 2 Q N/C 12 2 K 2 J 13 GND 2 Q 14 1 Q 2 Q 15 1 Q 2 K 16
38、 1 K N/C 17 - - - GND 18 - - - 1 Q 19 - - - 1 Q 20 - - - 1 K FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION
39、LEVEL J SHEET 7 DSCC FORM 2234 APR 97 Inputs Outputs PRE CLR CLK J K Q Q L H X X X H L H L X X X L H L L X X X H* H* H H L L Q0 Q0 H H H L H L H H L H L H H H H H TOGGLE H H H X X Q0 Q0 H = High level (steady state). L = Low level (steady state). X = Irrelevant. = Transition from high to low level.
40、Q0= The level of Q before the indicated steady state input conditions were established. Toggle: Each output changes to the complement of its previous level on each clock transition. * This configuration is nonstable, that is, it will not persist when preset and clear inputs return to their inactive
41、(high) level. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic di
42、agram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 9 DSCC FORM 2234 APR 97 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and
43、 inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria sha
44、ll apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
45、inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior
46、 to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspecti
47、on. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, 6, and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c, Subgroup 7 shall include verification of the truth table. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with
48、 MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 9, 10*, 11* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without li
