DLA SMD-5962-76032 REV E-2005 MICROCIRCUIT DIGITAL BIPOLAR LOW POWER SCHOTTKY TTL COUNTER MONOLITHIC SILICON《硅单片计算器肖脱基小功率TTL双极数字微型电路》.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Revised to military drawing format. Delete vendors, CAGE 07263, 27014 and 18324. Add note for no approved source available for packages A and B. Add LCC package, case outline 2. Table I, fMAX(A to QA, CL= 15 pF, 10 and 11); change 20 MHz to 19 MH

2、z. (50 pF, 10 and 11); change 23 MHz to 18 MHz. (B to QB, CL= 15 pF, 10 and 11); change from 11 MHz to 10 MHz. Change IIH3, 200 A to 80 A. IIH4, 200 A to 400 A, IIH5, 80 A to 160 A, IIH6, 400 A to 800 A. Add logic diagram. Change CAGE number to 67268. 87-10-05 R. P. Evans D Update to reflect latest

3、changes in format and requirements. Editorial changes throughout. - les 03-04-07 Raymond Monnin E Change 3.5 marking paragraph to remove “5962”. Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-08-16 Thomas M. Hess CURRENT CAGE CODE 67268 THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN RE

4、PLACED. REV SHEET REV SHEET REV STATUS REV E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Monica L. Grosel DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. Di Cenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAIL

5、ABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Robert P. Evans MICROCIRCUIT, DIGITAL, BIPOLAR LOW POWER SCHOTTKY TTL, COUNTER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 76-11-24 MONOLITHIC SILICON AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 14933 76032 SHEET 1 OF 11 DSCC FORM 2233

6、APR 97 5962-E476-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76032 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing de

7、scribes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 76032 01 C X Drawing number Device type (see 1.2.1) Case outline(see 1

8、.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54LS90 Decade counter 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive

9、designator Terminals Package style A GDFP5-F14 or CDFP6-F14 14 Flat B GDFP4-F14 14 Flat C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum r

10、atings. Supply voltage . -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) per device 1/ 85 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC): See MIL-STD-18

11、35 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimim to 5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL). 0.7 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Must wit

12、hstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76032 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR

13、97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contra

14、ct. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOO

15、KS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D

16、, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption h

17、as been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certifie

18、d and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in

19、 the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is requ

20、ired to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.

21、2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified

22、herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are d

23、escribed in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76032 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in a

24、ccordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, ap

25、pendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an

26、approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate

27、 of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verificatio

28、n and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking p

29、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76032 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Gr

30、oup A subgroupsDevice type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V, IOH= -0.4 mA, All 2.5 V IL= 0.7 V, VIH= 2.0 V 1, 2, 3 Low level output voltage VOLVCC= 4.5 V, IOL= 4.0 mA, VIL= 0.7 V, VIH= 2.0 V 1, 2, 3 All 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1 All -1.5 V Inpu

31、t current at reset inputs IIH1VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 20 A IIH2VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 All 100 A IIL1VCC= 5.5 V, VIL= 0.4 V 1, 2, 3 All -400 A Input current at A input IIH3VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 80 A IIH4VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 All 400 A IIL2VCC= 5.5 V, VIL= 0.4

32、V 1, 2, 3 All -2.4 mA Input current at B input IIH5VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 160 A IIH6VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 All 800 A IL3VCC= 5.5 V, VIL= 0.4 V 1, 2, 3 All -3.2 mA Short circuit output current IOS VCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 All -15 -130 mA Supply current ICCVCC= 5.5 V 1, 2

33、, 3 All 15 mA Functional tests See 4.3.1c 7 All fMAX19 All 32 MHz VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 All 19 MHz 28 Maximum clock frequency from A to QA2/ CL= 50 pF 10% 10, 11 All 18 MHz fMAX29 16 CL= 15 pF 10% 10, 11 All 10 MHz 11 Maximum clock frequency from B to QBCL= 50 pF 10% 10, 11 All

34、 6 MHz tPHL19 18 ns CL= 15 pF 10% 10, 11 All 25 ns 23 Propagation delay time, from A to QACL= 50 pF 10% 10, 11 All 32 ns tPLH19 16 CL= 15 pF 10% 10, 11 All 22 ns 21 CL= 50 pF 10% 10, 11 All 29 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted with

35、out license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76032 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Gro

36、up A subgroupsDevice type Limits Unit Min Max tPHL29 All 50 ns VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 All 70 ns 55 Propagation delay time, from A to QD2/ CL= 50 pF 10% 10, 11 All 77 ns tPLH29 48 CL= 15 pF 10% 10, 11 All 67 ns 53 CL= 50 pF 10% 10, 11 All 74 ns tPHL39 21 CL= 15 pF 10% 10, 11 All

37、29 ns 26 Propagation delay time, from B to QBCL= 50 pF 10% 10, 11 All 36 ns tPLH39 16 CL= 15 pF 10% 10, 11 All 22 ns 21 CL= 50 pF 10% 10, 11 All 29 ns tPHL49 35 CL= 15 pF 10% 10, 11 All 49 ns 40 Propagation delay time, from B to QCCL= 50 pF 10% 10, 11 All 56 ns tPLH49 32 CL= 15 pF 10% 10, 11 All 45

38、ns 37 CL= 50 pF 10% 10, 11 All 52 ns tPHL59 35 CL= 15 pF 10% 10, 11 All 49 ns 40 Propagation delay time, from B to QDCL= 50 pF 10% 10, 11 All 56 ns tPLH59 32 CL= 15 pF 10% 10, 11 All 45 ns 37 CL= 50 pF 10% 10, 11 All 52 ns tPHL69 40 CL= 15 pF 10% 10, 11 All 56 ns 45 Propagation delay time, from set-

39、to-0 to output CL= 50 pF 10% 10, 11 All 63 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76032 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7

40、DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max tPHL79 All 40 ns VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 All 56 ns 45 Propagation delay time, from s

41、et-to-9 to QBor QC2/ CL= 50 pF 10% 10, 11 All 63 ns tPLH79 30 CL= 15 pF 10% 10, 11 All 42 ns 35 Propagation delay time, from set-to-9 to QAor QDCL= 50 pF 10% 10, 11 All 49 ns 1/ Not more than one output should be shorted at a time, and the duration of the short circuit condition should not exceed on

42、e second. 2/ Propagation delay time testing and maximum clock frequency testing may be performed using either CL= 15 pF or CL= 50 pF. However, the manufacturer must certify and guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. Case outlines A, B, C, and D 2

43、Terminal number Terminal symbol 1 CKB NC 2 R0(1)CKB 3 R0(2)R0(1)4 NC R0(2)5 VCCNC 6 R9(1)7 R9(2)NC 8 QCVCC9 QBR9(1)10 GND R9(2)11 QDNC 12 QAQC13 NC QB14 CKA GND 15 - - - NC 16 - - - QD17 - - - NC 18 - - - QA19 - - - NC 20 - - - CKA FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo repr

44、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76032 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 Reset/count function table Reset inputs Output R0(1)R0(2)R9(1)R9(2)QDQCQBQAH H L X L L L L

45、H H X L L L L L X X H H H L L H X L X L Count L X L X Count L X X L Count X L L X Count NOTES: A. Output QAis connected to input B for BCD count. B. Output QDis connected to input A for bi-quinary count. C. H = high level, L = low level, X = irrelevant. BI-Quinary (5-2) (See note B) BCD count sequen

46、ce (See note A) Count Output Count Output QAQDQCQB QDQCQB QA0 L L L L 0 L L L L 1 L L L H 1 L L L H 2 L L H L 2 L L H L 3 L L H H 3 L L H H 4 L H L L 4 L H L L 5 H L L L 5 L H L H 6 H L L H 6 L H H L 7 H L H L 7 L H H H 8 H L H H 8 H L L L 9 H H L L 9 H L L H FIGURE 2. Truth tables. Provided by IHSN

47、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76032 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction o

48、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76032 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shal

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