1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED D Delete vendors: CAGE 07263, 27014, and 18324. Delete all sources from 7700101AX, and add footnote. Add logic diagram. Figure 1, change pin 1 to CKB and pin 14 to CKA. Revise to military drawing format. 87-11-09 R. P. Evans E Changes in accordance
2、 with NOR 5962-R173-92. -tvn 92-04-27 Monica L. Poelking F Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 03-08-26 Raymond Monnin G Update to reflect latest changes in format and requirements. Correct paragraph in 3.5. Editorial changes throughout. le
3、s 05-08-16 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Monica L. Grosel DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT
4、DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Robert P. Evans MICROCIRCUIT, DIGITAL, BIPOLAR LOW- POWER SCHOTTKY TTL, COUNTER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 77-02-03
5、 MONOLITHIC SILICON AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 14933 77001 SHEET 1 OF 8 DSCC FORM 2233 APR 97 5962-E459-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77001 DEFENSE SUPPLY CENTER COLUMBUS COLUM
6、BUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as
7、 shown in the following example: 77001 01 A X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 54LS93 Binary counter 1.2.2 Case outlines. Th
8、e case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style A GDFP5-F14 or CDFP6-F14 14 flat C GDIP1-T14 or CDIP2-T14 14 dual-in-line D GDFP1-F14 or CDFP2-F14 14 flat 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-385
9、35, appendix A. 1.3 Absolute maximum ratings. Supply voltage range. -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) per device 1/ . 83 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resi
10、stance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimim to 5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) 0.7 V dc Case operating tem
11、perature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short-circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77001 D
12、EFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unl
13、ess otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits.
14、 MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or ht
15、tp:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Not
16、hing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified h
17、erein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved progra
18、m plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect
19、 the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appe
20、ndix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagrams. The logic diagrams s
21、hall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or netw
22、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in tabl
23、e II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A
24、 compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of c
25、ompliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers
26、 product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Noti
27、fication of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made avai
28、lable onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices p
29、rior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the prep
30、aring or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as speci
31、fied in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77001 DEFENSE SUPPLY CENTER C
32、OLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V, IOH= -0.4 mA, VI
33、H= 2.0 V, VIL= 0.7 V 1, 2, 3 All 2.5 V Low level output voltage VOLVCC= 4.5 V, IOL= 4.0 mA, VIH= 2.0 V, VIL= 0.7 V 1, 2, 3 All 0.4 V Input clamp voltage VIC VCC= 4.5 V, IIN= -18 mA TC= +25C 1 All -1.5 V High level input current at reset inputs IIH1VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 20 A IIH2VCC= 5.5
34、 V, VIH= 5.5 V 1, 2, 3 All 100 A High level input current at A input IIH3VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 40 A IIH4VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 All 200 A High level input current at B input IIH5VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 All 80 A IIH6VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 All 400 A Low level input c
35、urrent at reset inputs IIL1VCC= 5.5 V, VIL= 0.4 V 1, 2, 3 All -0.4 mA Low level input current at A input IIL2VCC= 5.5 V, VIL= 0.4 V 1, 2, 3 All -2.4 mA Low level input current at B input IIL3VCC= 5.5 V, VIL= 0.4 V 1, 2, 3 All -3.2 mA Short circuit output current IOS VCC= 5.5 V, VOUT= 0 V 1/ 1, 2, 3
36、All -15 -130 mA Supply current ICCVCC= 5.5 V 1, 2, 3 All 15 mA Functional tests See 4.3.1c 7 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77001 DEFENSE SUPPLY CENTER COLUMBUS
37、COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max fMAX19 All 32 MHz Maximum clock frequency from A to Q
38、AVCC= 5.0 V, RL= 2 k 5% 2/ CL= 15 pF 10% 10, 11 All 20 MHz 9 All 28 MHz CL= 50 pF 10% 10, 11 All 19 MHz fMAX29 All 16 MHz Maximum clock frequency from B to QBCL= 15 pF 10% 10, 11 All 10 MHz 9 All 11 MHz CL= 50 pF 10% 10, 11 All 6 MHz tPHL19 All 18 ns Propagation delay time, output from A to QACL= 15
39、 pF 10% 10, 11 All 25 ns CL= 50 pF 10% 9 All 23 ns 10, 11 All 32 ns tPLH19 All 16 CL= 15 pF 10% 10, 11 All 22 ns All 21 CL= 50 pF 10% 10, 11 All 29 ns tPHL29 All 70 Propagation delay time, output from A to QDCL= 15 pF 10% 10, 11 All 98 ns All 75 CL= 50 pF 10% 10, 11 All 105 ns tPLH29 All 70 CL= 15 p
40、F 10% 10, 11 All 98 ns All 75 CL= 50 pF 10% 10, 11 All 105 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION
41、LEVEL G SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max tPHL39 All 21 ns Propagation delay time, output from B to QB VCC= 5.0 V, RL= 2 k 5% 2/ C
42、L= 15 pF 10% 10, 11 All 29 ns 9 All 26 ns CL= 50 pF 10% 10, 11 All 36 ns tPLH39 All 16 CL= 15 pF 10% 10, 11 All 22 ns 9 All 21 ns CL= 50 pF 10% 10, 11 All 29 ns tPHL49 All 35 Propagation delay time, output from B to QCCL= 15 pF 10% 10, 11 All 49 ns CL= 50 pF 10% 9 All 40 ns 10, 11 All 56 ns tPLH49 A
43、ll 32 CL= 15 pF 10% 10, 11 All 45 ns All 37 CL= 50 pF 10% 10, 11 All 52 ns tPHL59 All 51 Propagation delay time, output from B to QDCL= 15 pF 10% 10, 11 All 71 ns All 56 CL= 50 pF 10% 10, 11 All 78 ns tPLH59 All 51 CL= 15 pF 10% 10, 11 All 71 ns All 56 CL= 50 pF 10% 10, 11 All 78 ns See footnotes at
44、 end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characte
45、ristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max tPHL69 All 40 ns Propagation delay time, output from set-to-0 to output VCC= 5.0 V, RL= 2 k 5% 2/ CL= 5 pF 10% 10, 11 All 56 ns All 45 CL= 50 pF 10% 10, 11 All 63 ns
46、1/ Not more than one output should be shorted at a time, and the duration of the short-circuit condition should not exceed one second. 2/ Propagation delay time testing and maximum clock frequency testing may be performed using either CL= 15 pF or CL= 50 pF. However, the manufacturer must certify an
47、d guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 77001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION
48、 LEVEL G SHEET 9 DSCC FORM 2234 APR 97 Device type 01 Case outlines A, C, and D Terminal number Terminal symbol 1 CKB 2 R0(1)3 R0(2)4 NC 5 VCC6 NC 7 NC 8 QC9 QB10 GND 11 QD12 QA13 NC 14 CKA NC = No connection. FIGURE 1. Terminal connections. Truth table Mode selection Output Reset inputs Outputs Count QAQBQCQDR0(1)R0(2)QAQBQCQD0 L L L L H H L L L L 1 H L L L L H Count 2 L H L L H L Count 3 H H L L L L Count 4 L L H L 5 H L H L H = High voltage level 6 L H H L L = Low voltage level 7 H H H L X = Dont care 8 L L L H
