DLA SMD-5962-84056 REV F-2009 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS DUAL D-TYPE FLIP-FLOP WITH CLEAR AND PRESET MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Convert to military drawing format. Add case outline 2 (square chip carrier package) for vendor CAGE (27014). Remove vendor from case A and add to case D. Device 01CX and 012X inactive for new design use M38510/65302BCX and M38510/65302B2X. Chang

2、e code ident. no. to 67268. Editorial changes throughout. 88-07-25 D. A. DiCenzo C Add vendor CAGE F8859. Add class V device criteria. Editorial changes throughout. ljs 99-11-19 Raymond Monnin D Correct data limits in paragraph 1.3 and test conditions in Table I. Add case outline X. Add Table III, d

3、elta limits. Editorial changes throughout. ljs 00-07-13 Raymond Monnin E Correct table II. Update boilerplate to MIL-PRF-38535 requirements. jak 02-01-14 Thomas M. Hess F Add JEDEC Standard 7-A in paragraphs 2.2 and 4.4.1c. Correct title to accurately describe the device function. Update boilerplate

4、 paragraphs to the current MIL-PRF-38535 requirements. - LTG 09-11-17 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeffery Tunstall DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OH

5、IO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY D. A. DiCenzo MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, DUAL D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, MO

6、NOLITHIC SILICON DRAWING APPROVAL DATE 84-08-10 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 14933 84056 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E031-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84056 DEFENSE

7、 SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and

8、 lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 84056 01 C A Drawing number Devic

9、e type (see 1.2.2) Case outline(see 1.2.4) Lead finish(see 1.2.5)For device class V: 5962 - 84056 01 V X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) /Drawing number 1.2.1 RHA d

10、esignator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-

11、) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC74 Dual D-type flip-flop with clear and preset 1.2.3 Device class designator. The device class designator is a single letter identifying

12、 the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor

13、 self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-

14、,-STANDARD MICROCIRCUIT DRAWING SIZE A 84056 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package st

15、yle A GDFP5-F14 or CDFP6-F14 14 Flat pack B GDFP4-F14 14 Flat packC GDIP1-T14or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes

16、Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp diode current (IIK) 20 mA Ou

17、tput clamp diode current (IOK) . 20 mA Continuous output current . 25 mA Continuous current through VCCor GND . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) .

18、See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V . 0 to 1,000 ns CC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to

19、 400 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ The limits for the parameters speified herein

20、 shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Maximum junction temperature shall not be exceeded except for allowable short circuit duration burn-in screening conditions in accordance with method 5

21、004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84056 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating condition

22、s Continued. Minimum setup time, data to clock (tSHL1) (tSLH1): TC= +25C: VCC= 2.0 V . 100 ns CC= 4.5 V . 20 ns VCC= 6.0 V . 17 ns TC= -55C to +125C: VCC= 2.0 V . 150 ns CC= 4.5 V . 30 ns VCC= 6.0 V . 25 ns Minimum setup time, preset or clear to clock (tSHL2): TC= +25C: VCC= 2.0 V . 30 ns CC= 4.5 V

23、. 6 ns VCC= 6.0 V . 5 ns TC= -55C to +125C: VCC= 2.0 V . 45 ns CC= 4.5 V . 9 ns VCC= 6.0 V . 8 ns Minimum width of clock, preset or clear pulse (tW): TC= +25C: VCC= 2.0 V . 100 ns CC= 4.5 V . 20 ns VCC= 6.0 V . 17 ns TC= -55C to +125C: VCC= 2.0 V . 150 ns CC= 4.5 V . 30 ns VCC= 6.0 V . 25 ns Minimum

24、 hold time, clock to DATA (tTHL) (tTLH): TC= +25C: VCC= 2.0 V . 3 ns CC= 4.5 V . 3 ns VCC= 6.0 V . 3 ns TC= -55C to +125C: VCC= 2.0 V . 3 ns CC= 4.5 V . 3 ns VCC= 6.0 V . 3 ns Minimum clock frequency (fmax): TC= +25C: VCC= 2.0 V . 6 MHz CC= 4.5 V . 31 MHz VCC= 6.0 V . 36 MHz TC= -55C to +125C: VCC=

25、2.0 V . 4.2 MHz CC= 4.5 V . 21 MHz VCC= 6.0 V . 25 MHz Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84056 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97

26、2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.

27、 DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS

28、MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-50

29、94.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 7-A - Standard for Des

30、cription of 54/74HCXXXXX and 54/74HCTXXXXX High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834). 2.3 Order of precedence. In the event of a conflict between the text of

31、 this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device cl

32、asses Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class

33、M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-

34、PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Lo

35、gic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCI

36、RCUIT DRAWING SIZE A 84056 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postir

37、radiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 M

38、arking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For R

39、HA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for devi

40、ce classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed ma

41、nufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitte

42、d to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate

43、of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notif

44、ication to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the

45、manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-

46、PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84056 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance

47、 characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High-level output voltage VOH VIN= VIHor VILIOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHor VILIOH= -4.0 mA VCC= 4.5 V 1 3.98 2, 3 3.7 VIN= VIH

48、or VILIOH= -5.2 mA VCC= 6.0 V 1 5.48 2, 3 5.2 Low-level output voltage VOLVIN= VIHor VILIOL= +20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHor VILIOL= +4.0 mA VCC= 4.5 V 1 0.26 2, 3 0.4 VIN= VIHor VILIOL= +5.2 mA VCC= 6.0 V 1 0.26 2, 3 0.4 High level input voltage VIH2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low-level input voltage VIL2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINTC= +25C, VCC= 2.0 V to 6.0 V See 4.4.1c 4 10.0 pF Power dissipation capacitance CPDSee 4.4.1c 4 35 pF Quiescen

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