1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in table I: Page 4, input offset voltage should read +VCC= 3.5 V, -VCC= -32.5 V. Page 5, gain error, reference subgroups 4, 5, 6, as separate tests. Temperature limits +VCC= 32.5 V should be .06 instead of .02. Page 6, changes acquisition
2、 parameters. Page 10, add replacement military specification part number. Inactivate drawing for new design. Editorial changes throughout. 88-05-11 M. A. FRYE B Changes in accordance with N.O.R. 5962-R313-92. 92-10-08 M. A. FRYE C Add generic part number 5537 as device type 02. Add vendor CAGE 18324
3、. Add case outline letter P. Make changes to 1.2.1, 1.2.2, 1.3, TABLE I, and FIGURE 1. Redrawn. 94-04-19 M. A. FRYE D Add device class level Q and V devices. Add case outline letter Z. Make changes to 1.2.2, 1.3, figure 1, table II, and the gain error test as specified in table I. - ro 01-05-25 R. M
4、ONNIN E Make change to 1.2. - ro 03-05-12 R. MONNIN F Separate Input offset voltage (VOS) test from Delta input offset (VOS) test as specified in table I. - ro 06-04-11 R. MONNIN G Update drawing as part of 5 year review. -jt 12-04-04 C. SAFFLE THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLA
5、CED. REV SHEET REV G G SHEET 15 16 REV STATUS REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY MARCIA B. KELLEHER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.Landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAIL
6、ABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAY MONNIN APPROVED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, SAMPLE AND HOLD, MONOLITHIC SILICON DRAWING APPROVAL DATE 87-06-17 AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 67268 5962-87608 SHEET 1 OF 16 DSCC FORM 223
7、3 APR 97 5962-E260-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87608 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing docu
8、ments two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness
9、 Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - 87608 01 G X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) / / Drawing numb
10、er For device class V: 5962 - 87608 01 V G X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet
11、the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types. The devi
12、ce types identify the circuit function as follows: Device type Generic number Circuit function 01 LF198 Sample and hold 02 5537 Sample and hold 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device clas
13、s designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant,
14、non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87608 DLA LAND AND MARI
15、TIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style G MACY1-X8 8 Can P GDIP1-T8 or CDIP2-T8 8 Dual-in-line Z GDFP1-G14 14 F
16、lat pack with gullwing leads 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ Supply voltage (VCC) 18 V Power dissipation (PD) 500 mW 2/ Input voltage (VIN) 18 V 3/ Logic t
17、o logic differential voltage . +7 V, -30 V 4/ Output short circuit duration Indefinite Hold capacitor short circuit duration 10 seconds Lead temperature (soldering, 10 seconds) 300C Storage temperature range . -65C to +150C Junction temperature (TJ) . +150C Thermal resistance, junction-to-case (JC):
18、 Case G 48C/W Case P . See MIL-STD-1835 Case Z . 20C/W Thermal resistance, junction-to-ambient (JA): Case G 160C/W, still air at 0.5 W 84C/W, 500 LFPM air flow 0.5 W Case P . 120C/W Case Z . 140C/W, still air at 0.5 W 95C/W, 500 LFPM air flow 0.5 W 1.4 Recommended operating conditions. Supply voltag
19、e (VCC) 15 V Ambient operating temperature range (TA) . -55C to +125C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ The maximum power dissipation must be derated at
20、 elevated temperatures and is dicated by TJMAX, JAand TA. The maximum allowable power dissipation at any temperature is PDMAX (TJMAX TA) / JAor the number given in the absolute maximum ratings, whichever is lower. 3/ The maximum input voltage shall not exceed the power supply voltage. 4/ Although th
21、e differential voltage may not exceed the limits given, the common-mode voltage the logic pins may be equal to the supply voltages without causing damage to the circuit. For proper logic operation, however, one of the logic pins must always be at 2 V below the positive supply and 3 V above the negat
22、ive supply. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87608 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specific
23、ation, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38
24、535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Dr
25、awings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a
26、 conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual it
27、em requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item r
28、equirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for d
29、evice classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Logic diagrams. The logic diagrams shall be
30、 as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating t
31、emperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers P
32、IN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q
33、 and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for dev
34、ice class M shall be a “C“ as required in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87608 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 22
35、34 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Input offset voltage VOS+VCC= 3 V, -VCC= -7 V 1 01 -3 3 mV 2,3 -5 5 VCC= 15 V 1 -3 3 2,3 -5 5 +VCC= 3.5 V, 1 -3 3 -VCC= -
36、26.5 V 2,3 -5 5 VCC= 18 V 1 -3 3 2,3 -5 5 +VCC= 3.5 V, 1 -3 3 -VCC= -32.5 V 2,3 -5 5 +VCC= 26.5 V, 1 -3 3 -VCC= -3.5 V 2,3 -5 5 +VCC= 32.5 V, 1 -3 3 -VCC= -3.5 V 2,3 -5 5 +VCC= 7 V, -VCC= -3 V 1 -3 3 2,3 -5 5 VCC= 5 V to 18 V 1 02 -3 3 2,3 -5 5 Positive supply current +ICCVCC= 15 V 1,2 01 5.5 mA 3 6
37、.5 VCC= 18 V 1,2 02 6.5 3 7.5 VCC= 18 V, 1,2 01 5.5 mode = sample 3 6.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87608 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV
38、ISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Positive supply current +ICCVCC= 18 V, 1,2 01 5.5 mA mode = hold 3 6.5 Negati
39、ve supply current -ICCVCC= 15 V 1,2 01 -5.5 mA 3 -6.5 VCC= 18 V 1,2 02 -6.5 3 -7.5 VCC= 18 V, 1,2 01 -5.5 mode = sample 3 -6.5 VCC= 18 V, 1,2 -5.5 mode = hold 3 -6.5 Input bias current IIB+VCC= 3 V, -VCC= -7 V 1 01 -25 25 nA 2,3 -75 75 VCC= 15 V 1 -25 25 2,3 -75 75 +VCC= 3.5 V, 1 -25 25 -VCC= -32.5
40、V 2,3 -75 75 +VCC= +32.5 V, 1 -25 25 -VCC= -3.5 V 2,3 -75 75 +VCC= 7 V, -VCC= -3 V 1 -25 25 2,3 -75 75 VCC= 5 V to 18 V 1 02 -25 25 2,3 -75 75 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWIN
41、G SIZE A 5962-87608 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Leakag
42、e current into 3/ hold capacitor ILEAK+VCC= 3 V, -VCC= -7 V, TA= +25C 1 01 -100 100 pA +VCC= 3.5 V, -VCC= -32.5 V, TA= +25C -100 100 +VCC= 32.5 V, -VCC= -3.5 V, TA= +25C -100 100 +VCC= 7 V, -VCC= -3 V, TA= +25C -100 100 Hold mode 1 02 .05 nA 2,3 25 Hold step 4/ VHSVCC= 15 V 1 01 -2 2 mV 2,3 -5.6 5.6
43、 +VCC= 3.5 V, 1 -2.5 2.5 -VCC= -26.5 V 2,3 -5.6 5.6 +VCC= 26.5 V, 1 -2.5 2.5 -VCC= -3.5 V 2,3 -5.6 5.6 VOUT= 0 V, TA= +25C, CH= 0.01 F 1 02 2.0 Input impedance ZIN+VCC= 8 V, -VCC= -28 V 1 01 10 G 2,3 0.8 +VCC= 28 V, -VCC= -8 V 1 10 2,3 0.8 Output impedance ZOUTVCC= 18 V 1 01 2 G 2,3 4 See footnotes
44、at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87608 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteri
45、stics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Output impedance ZOUTHold mode 1 02 2 2,3 4 Capacitor charging current ICHRG+VCC= 8 V, 1 01 -25 -4.5 mA -VCC= -28 V 2,3 -25 -3 +VCC= 28 V, 1 4.5 25 -VCC= -8 V 2,3
46、3 25 Logic pin current LOGIC VCC= 18 V, mode = sample 1,2,3 01 10 A VCC= 18 V, 1 1 mode = hold 2,3 0.5 Input offset voltage VOSVCC= 15 V, 1 01 -3.5 3.5 mV 1Drive = +1 mA 2,3 -6 6 Delta input offset voltage VOSVCC= 15 V, 1 01 -1.1 1.1 mV 1Drive = +1 mA to 1 mA 2,3 -2 2 Output short circuit current +I
47、OSVCC= 18 V, TA= +25C 1 01 7 20 mA -IOSVCC= 18 V, TA= +25C -25 7 Logic reference pin current ILOGVCC= 18 V, 1 01 -1 1 A mode = sample 2,3 -0.5 5 VCC= 18 V, mode = hold 1,2,3 10 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH
48、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87608 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Logic and logic reference input current ILOGVIN= 2.4 V 1 0
