DLA SMD-5962-87647 REV C-2013 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS QUAD 2-INPUT NAND GATE WITH OPEN DRAIN OUTPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R029-93. - WLM 92-12-15 Monica L. Poelking B Correct title to accurately describe device function. Add notes to figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements.

2、Editorial changes throughout. LTG 06-10-12 Thomas M. Hess C Update low level output voltage test condition IOLto table I. Update boilerplate paragraphs as required by the MIL-PRF-38535. MAA 13-06-06 Thomas M. Hess THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV ST

3、ATUS REV C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Dan DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVE

4、D BY N. A. Hauck MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, QUAD 2-INPUT NAND GATE WITH OPEN DRAIN OUTPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-07-24 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-87647 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E1

5、09-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87647 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device req

6、uirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87647 01 C A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead f

7、inish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC03 Quad 2-input NAND gate with open drain outputs 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline l

8、etter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V d

9、c DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIC) 20 mA DC output current (per pin) 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD)

10、 . 500 mW 2/ Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55C to +125C I

11、nput rise or fall time (tr, tf): VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns _ 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permi

12、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87647 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and

13、 handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTM

14、ENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these docu

15、ments are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of t

16、his drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class l

17、evel B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with

18、the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. The

19、se modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as

20、 specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Log

21、ic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance character

22、istics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87647 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISIO

23、N LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The pa

24、rt shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification

25、/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3

26、.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply

27、 shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawi

28、ng. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers fa

29、cility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87647 DLA LAND AND MARITIME

30、COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Low level output voltage VOLVIN= VIHor VILIOL= 20 A VCC= 2.0

31、V 1, 2, 3 01 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHor VILIOL= 4.0 mA VCC= 4.5 V 0.4 VIN= VIHor VILIOL= 5.2 mA VCC= 6.0 V 0.4 High level input voltage 2/ VIHVCC= 2.0 V 1, 2, 3 01 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage 2/ VILVCC= 2.0 V 1, 2, 3 01 0.3 V VCC= 4.5 V 0.9 VCC= 6

32、.0 V 1.2 Input capacitance CINVIN= 0 V, TC= +25C See 4.3.1c 4 01 10 pF Output capacitance COUTVIN= 0 V, TC= +25C See 4.3.1c 4 01 20 pF Quiescent supply current ICCVCC= 6.0 V VIN= VCCor GND 1, 2, 3 01 40 A Input leakage current IINVCC= 6.0 V VIN= VCCor GND 1, 2, 3 01 1 A Three-state output current IO

33、ZVCC= 6.0 V, VOUT= VCCor GND VIN= VIHor VIL1, 2, 3 01 10 Functional tests See 4.3.1d 7 01 Propagation delay time, An or Bn to Yn 3/ tPLZ, tPZLCL= 50 pF 10% See figure 4 VCC= 2.0 V 9 01 125 ns 10, 11 190 VCC= 4.5 V 9 25 10, 11 38 VCC= 6.0 V 9 23 10, 11 32 See footnotes at end of table. Provided by IH

34、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87647 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol

35、Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Transition time 4/ tTHLCL= 50 pF 10% See figure 4 VCC= 2.0 V 9 01 75 ns 10, 11 110 VCC= 4.5 V 9 15 10, 11 22 VCC= 6.0 V 9 13 10, 11 19 1/ For a power supply of 5 V 10 percent, the worst case outp

36、ut voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. (The VIHvalue at 5.5 V is 3.85 V). The worst case leakage currents (IIN, ICC, and IOZ) occur for CMOS at the highe

37、r voltage so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 30 pF, determines the no load dynamic power consumption, PD= CPDx VCC2f + ICCx VCC, and the no load dynamic current consumption, IS= CPDx VCCf + ICC. 2/ Test is not required if applied as a forcing function

38、for VOL. 3/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified limits. 4/ Transition times (tTHL), if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

39、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-87647 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines C 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A1 B1 Y1 A2 B2 Y2 GND Y3 A3 B3 Y4 A4 B4 VC

40、C- - - - - - NC A1 B1 Y1 NC A2 NC B2 Y2 GND NC Y3 A3 B3 NC Y4 NC A4 B4 VCCNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87647 DLA LAND AND MARITIME COLUMBU

41、S, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Inputs Outputs An Bn Yn L L Z L H Z H L Z H H L H = High voltage level L = Low voltage level Z = High impedance FIGURE 2. Truth table. NOTE: Open-drain outputs FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or n

42、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87647 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance). 2. Input signal from p

43、ulse generator: VIN= 0.0 V to VCC; PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand tfshall be measured from 0.1 VCCto 0.9 VCCand from 0.9 VCCto 0.1 VCC, respectively; duty cycle = 50 percent. 3. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveform

44、s and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87647 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspe

45、ction. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall app

46、ly: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs

47、, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in

48、 are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - Final electrical test parameters (method 5004) 1*, 2, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 9, 10*, 11* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11,

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