1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - drw 04-01-27 Raymond Monnin THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6
2、 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, CMOS, D
3、UAL 12-BIT, DIGITAL-TO-ANALOG CONVERTER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-05-10 MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-87763 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E115-04 DISTRIBUTION STATEMENT A. Approved for public release; dis
4、tribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87763 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This dr
5、awing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87763 01 L A Drawing number Device type (see 1.2.1) Case
6、outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 7537S 8 + 4 loading structure, dual 12-bit CMOS D/A converter, 11-bit linearity, 6 LSBs of gain error 02 7537T 8 + 4 loading struc
7、ture, dual 12-bit CMOS D/A converter, 12-bit linearity, 3 LSBs of gain error 03 7537U 8 + 4 loading structure, dual 12-bit CMOS D/A converter, 12-bit linearity, 2 LSBs of gain error 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive de
8、signator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. VDDto DGND -0.3 V, +17 V VREFA, VREFBto AGNDA, AGNDB. 25 V VRFBA, VRFBB
9、to AGNDA, AGNDB. 25 V Digital input voltage to DGND. -0.3 V, VDD+0.3 V VIOUTA, VIOUTBto DGND. -0.3 V, VDD+0.3 V AGNDA, AGNDB to DGND -0.3 V, VDD+0.3 V Power dissipation: Up to +75C 450 mW Derate above +75C . 6 mW/C Lead temperature (soldering, 10 seconds). +300C Thermal resistance (JC): Cases L and
10、3 . See MIL-STD-1835 Thermal resistance (JA) . 120C/W Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87763 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR
11、 97 1.4 Recommended operating conditions. Ambient operating temperature range -55C to +125C Supply voltage range (VDD). 10.8 V dc to 16.5 V dc Minimum high level input voltage 2.4 V dc Maximum low level input voltage. 0.8 V dc VREFA, VREFB10 V dc VAGNDA, VIOUTA. 0 V dc VAGNDB, VIOUTB. 0 V dc Output
12、amplifiers . AD644 or equivalent 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those liste
13、d in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883
14、 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification,
15、 standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes pr
16、ecedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87763 DEFENSE SUPPLY CENT
17、ER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing
18、that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approv
19、al in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ o
20、r “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline
21、s. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagrams. The logic diagrams shall be as specified on figure 3. 3
22、.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subg
23、roups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL
24、-HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devic
25、es built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from
26、a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A a
27、nd the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance
28、with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by I
29、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87763 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Co
30、nditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxResolution 12 Bits Input low voltage VILVDD= 10.8 V and 16.5 V 1, 2, 3 All 0.8 V Input high voltage VIHVDD= 10.8 V and 16.5 V 1, 2, 3 All 2.4 V Input current IINVIN= VDD= 16.5 V 1 All 1.0 A 2, 3 10.
31、0 Supply current IDDVDD= 16.5 V 1, 2, 3 All 2.0 mA Relative accuracy RA VDD= 10.8 V and 16.5 V 1 All -1.0 +1.0 LSB 2, 3 01 -1.0 +1.0 2, 3 02, 03 -0.5 +0.5 12 02, 03 -0.5 +0.5 Differential nonlinearity DNL All grades guaranteed monotonic to 12 bits over -55C to +125C range. VDD= 10.8 V and 16.5 V 1,
32、2, 3 All -1.0 +1.0 LSB Gain error AEMeasured using RFAand RFB. Both DAC registers loaded 1 All -6.0 +6.0 LSB with all 1s. VDD= 10.8 V 2, 3 01 -6.0 +6.0 2, 3 02 -3.0 +3.0 2, 3 03 -2.0 +2.0 12 02 -3.0 +3.0 12 03 -2.0 +2.0 Gain temperature 2/ coefficient TCAE/dt 4 All -5.0 +5.0 ppm/C See footnotes at e
33、nd of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87763 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance chara
34、cteristics - continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxOutput leakage current IOUTADAC A register loaded with all 0s. VDD= 16.5 V 1 All -10 +10 nA 2, 3 -250 +250 Output leakage current IOUTBDAC B register loaded wit
35、h all 0s. VDD= 16.5 V 1 All -10 +10 nA 2, 3 -250 +250 Reference input resistance RIVDD= 10.8 V 1, 2, 3 All 9 20 k Reference input resistance match. VREFA, RINVDD= 10.8 V 1 All -3 +3 % VREFB2, 3 01, 02 -3 +3 2, 3 03 -1 +1 12 03 -1 +1 Output current settling time 2/, 3/ tSL4 All 1.5 s AC feedthrough V
36、REFAto IOUTAand VREFBto IOUTB2/ FT VREFA, VREFB= 20 V p-p, 10 kHz sinewave. DAC register loaded with all 0s 4 All -65 dB Power supply rejection ratio PSRR VDD= VDDmax VDDmin VDD= 10.8 V 1 All -0.01 +0.01 %/% 2, 3 -0.02 +0.02 Output capacitance for DAC A and DAC B COUTDAC A, DAC B loaded with 0s 4 Al
37、l 70 pF DAC A, DAC B loaded with 1s 140 Functional test See 4.3.1c 7 All Address valid to write setup time, t1tAWSSee figure 4 9, 10, 11 All 30 ns Address valid to write hold time, t2tAWHSee figure 4 9, 10, 11 All 25 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or n
38、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87763 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125
39、C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxData setup time, t3tOSSee figure 4 9, 10, 11 All 80 ns Data hold time, t4tOHSee figure 4 9, 10, 11 All 25 ns Chip select or update to write setup time, t5tCWSSee figure 4 9, 10, 11 All 0 ns Chip select or update to write h
40、old time, t6tCWHSee figure 4 9, 10, 11 All 0 ns Write pulse width, t7tWRSee figure 4 9, 10, 11 All 100 ns Clear pulse width, t8tCLSee figure 4 9, 10, 11 All 100 ns 1/ VDD= 10.8 V to 16.5 V except where otherwise specified; VREFA= VREFB= 10 V (see 1.4). VAGNDA= VAGNDB= 0 V, VIOUTA= VIOUTB= 0 V. 2/ Gu
41、aranteed if not tested to the limits as specified on table I. 2/ To 0.01 percent of full-scale-range. IOUTload = 100; CEXT= 13 pF. DAC output measured from rising edge of WR . Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW
42、ING SIZE A 5962-87763 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Device types 01, 02, 03 Case outlines L 3 Pin function description Terminal number Terminal symbol Mnemonic Description 1 AGNDA NC AGNDA Analog ground for DAC A. 2 IOUTAAGNDA
43、 IOUTACurrent output terminal of DAC A. 3 RFBAIOUTARFBAFeedback resistor for DAC A. 4 VREFARFBAVREFAReference input to DAC A. 5 CS VREFACS Chip select input. Active low. 6 DB0 CS DB0-DB7 Eight data inputs, DB0-DB7 7 DB1 DB0 DGND Digital ground 8 DB2 NC A0 Address line 0. 9 DB3 DB1 A1 Address line 1.
44、 10 DB4 DB2 CLR Clear input. Active low. Clears all registers. 11 DB5 DB3 WR Write input. Active low. 12 DGND DB4 UPD Updates DAC registers from input registers. 13 DB6 DB5 VDDPower supply input. Nominally +12 V to 15 V, with 10 percent tolerance. 14 DB7 DGND VREFBReference input to DAC B. 15 A0 NC
45、RFBBFeedback resistor for DAC B. 16 A1 DB6 IOUTBCurrent output terminal of DAC B. 17 CLR DB7 AGNDB Analog ground for DAC B. 18 WR A0 NC No connect. 19 UPD A1 20 VDDCLR 21 VREFBWR 22 RFBBNC 23 IOUTBUPD 24 AGNDB VDD25 - - - VREFB26 - - - RFBB27 - - - IOUTB28 - - - AGNDB FIGURE 1. Terminal connections
46、and function descriptions. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87763 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 CLR UPD CS WR A1 A0 Fun
47、ction 1 1 1 X X X No data transfer 1 1 X 1 X X No data transfer 0 X X X X X All registers cleared 1 1 0 0 0 0 DAC A LS input register loaded with DB7 DB0 1 1 0 0 0 1 DAC A MS input register loaded with DB3 DB0 1 1 0 0 1 0 DAC B LS input register loaded with DB7 DB0 1 1 0 0 1 1 DAC B MS input registe
48、r loaded with DB3 DB0 1 0 1 0 X X DAC A, DAC B registers updated simultaneously from input registers 1 0 0 0 X X DAC A, DAC B registers are transparent FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87763 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-
