DLA SMD-5962-89682 REV C-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL TRANSCEIVER REGISTER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add RHA data and limits. Editorial changes throughout - jak. 99-04-23 Monica L. Poelking B Update the boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 09-03-24 Thomas M. Hess C Add footnote 9/ for input capacitance (Cin) va

2、lue to table I. Update boilerplate paragraphs to the current requirement of MIL-PRF-38535. - MAA 11-12-12 Thomas M. Hess REV SHEET REV C C C C C SHEET 15 16 17 18 19 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Monica L. Poelking DL

3、A LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY William J. Johnson APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS,

4、 OCTAL TRANSCEIVER/REGISTER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 89-07-28 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-89682 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E466-11Provided by IHSNot for ResaleNo reproduction or networking permitted without license fro

5、m IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89682 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space app

6、lication (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For d

7、evice classes M and Q: 5962 89682 01 K A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) / / Drawing number For device class V: 5962 R 89682 01 V K A Federal stock class designator RHA designator (see 1.2.1) Device ty

8、pe (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA ma

9、rked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AC646 Oc

10、tal transceiver/register with three-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and

11、Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certif

12、ication and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89682 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outli

13、ne(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is

14、as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +6.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VC

15、C+ 0.5 V dc Clamp diode current (IIK, IOK) . 20 mA DC output current (per pin) 50 mA DC VCCor GND current (per pin) . 100 mA Maximum power dissipation (PD) . 500 mW Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (J

16、C) . See MIL-STD-1835 Junction temperature (TJ) +175C 4/ 1.4 Recommended operating conditions. 2/ 3/ 5/ Supply voltage range (VCC) 3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT). +0.0 V dc to VCCMinimum setup time, A, B to CAB, CBA (ts): TC= +25C, VCC= 3.

17、0 V 5.0 ns TC= -55C to +125C, VCC= 3.0 V 6.0 ns TC= +25C, VCC= 4.5 V 4.0 ns TC= -55C to +125C, VCC= 4.5 V 4.5 ns Minimum hold time, A, B to CAB, CBA (th): TC= +25C, VCC= 3.0 V 1.0 ns TC= -55C to +125C, VCC= 3.0 V 1.5 ns TC= +25C, VCC= 4.5 V 1.5 ns TC= -55C to +125C, VCC= 4.5 V 2.0 ns Minimum pulse w

18、idth CAB, CBA (tw): TC= +25C, VCC= 3.0 V 5.0 ns TC= -55C to +125C, VCC= 3.0 V 5.0 ns TC= +25C, VCC= 4.5 V 5.0 ns TC= -55C to +125C, VCC= 4.5 V 5.0 ns Case operating temperature range (TC) -55C to +125C Input rise or fall time rate (VCC= 3.6 V to 5.5 V) 0 to 8 ns/V 1/ Stresses above the absolute maxi

19、mum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange

20、and case temperature range of -55C to +125C. 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention

21、and battery back-up systems. Data retention implies no input transition and no stored data loss with the following conditions: VIH 70% VCC, VIL 30% VCC, VOH 70% VCC -20 A, VOL 30% VCC 20 A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MIC

22、ROCIRCUIT DRAWING SIZE A 5962-89682 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 1.5 Radiation features: Maximum total dose available (dose rate = 50 to 300 rads(Si)/s) (effective dose rate = 165 mrads(Si)/s). . 100 krads (Si) Device type 01 is irrad

23、iated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature anneal = 165 mrads (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The to

24、tal dose specification for this device only applies to the specified effective dose rate, or lower, environment. 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified h

25、erein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Micr

26、ocircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quickse

27、arch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cite

28、d in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Te

29、chnology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable law

30、s and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89682 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 A

31、PR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the for

32、m, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dime

33、nsions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified

34、on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The truth table shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.2.6 Radiation exposure

35、circuit. The radiation exposure circuit shall be as specified when available. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table

36、I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed

37、in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shal

38、l still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as require

39、d in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of

40、this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an

41、approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of con

42、formance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA

43、 of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the optio

44、n to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group num

45、ber 37 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89682 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical

46、 performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/, 3/ -55C TC +125C +3.0 V VCC +5.5 V unless otherwise specified Device type 4/ and device class VCCGroup A subgroups Limits 5/ Unit Min Max Positive input clamp voltage 3022 VIC+For input under test, IIN= 1.0

47、mA All V 0.0 V 1 0.4 1.5 V Negative input clamp voltage 3022 VIC-For input under test, IIN= -1.0 mA All V Open 1 -0.4 -1.5 V High level input voltage VIHAll All 3.0 V 1, 2, 3 2.1 V 6/ All All 4.5 V 1, 2, 3 3.15 All All 5.5 V 1, 2, 3 3.85 Low level input voltage VILAll All 3.0 V 1, 2, 3 0.9 V 6/ All

48、All 4.5 V 1, 2, 3 1.35 All All 5.5 V 1, 2, 3 1.65 High level output voltage VOH VIN= VIHminimum or VILmaximum All All 3.0 V 1, 2, 3 2.9 V 3006 7/ IOH= -50 A All All 4.5 V 1, 2, 3 4.4 All All 5.5 V 1, 2, 3 5.4 VIN= VIHminimum or VILmaximum IOH= -4 mA All All 3.0 V 1, 2, 3 2.4 VIN= VIHminimum or VILmaximum IOH= -24 mA All All 4.5 V 1, 2, 3 3.7 All All 5.5 V 1, 2, 3 4.7 VIN= VIHminimum or VILmaximum IOH= -50 mA All All 5.5 V 1, 2, 3 3.85 Low level output voltage VOL VIN= VIHminimum or VILmaximum IOL= +50 A All All 3.0 V 1, 2, 3 0.1 V 3007 7/ All All 4

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