1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw, correct, and add notes to figure 4, switching waveforms and test circuit. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout jak. 05-10-03 Thomas M. Hess B Update test condition of h
2、igh and low level voltage to table I. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 12-01-19 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND MARITIME COLUMBUS
3、, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Monica L. Poelking APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 3-LINE TO 8-LINE
4、 DECODER/DEMULTIPLEXER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 89-08-25 REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89745 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E107-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAND
5、ARD MICROCIRCUIT DRAWING SIZE A 5962-89745 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, ap
6、pendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89745 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device t
7、ype Generic number Circuit function 01 54HCT238 3-line to 8-line decoder/demultiplexer, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in
8、-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range
9、 (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Input diode current (IIK) 20 mA DC output diode current (per pin) (IOK) . 20 mA DC drain current (per pin) (IDRAIN) 25 mA DC VCCor GND current (per pin) (ICC, IGND) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 4
10、/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT).
11、 +0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 4.5 V . 0 to 500 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliab
12、ility. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 11 mW/C. Provided by IHSNot for Resal
13、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89745 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The fol
14、lowing specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing
15、, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcir
16、cuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this doc
17、ument to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices.
18、(Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
19、text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JA
20、N class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accorda
21、nce with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the de
22、vice. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions sh
23、all be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2.
24、3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89745 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FO
25、RM 2234 APR 97 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply
26、 over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix
27、A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Cert
28、ification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option i
29、s used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source
30、 of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to
31、this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manuf
32、acturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89745 DLA LAND AN
33、D MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIH= 2.0 V or VIL= 0.8 V
34、IOH= -20 A 4.5 V 1, 2, 3 4.4 V IOH= -4 mA 3.7 Low level output voltage VOLVIH= 2.0 V or VIL= 0.8 V IOL= +20 A 4.5 V 1, 2, 3 0.1 V IOL= +4 mA 0.4 High level input voltage VIH2/ 4.5 V 1, 2, 3 2.0 V Low level input voltage VIL2/ 4.5 V 1, 2, 3 0.8 V Input capacitance CINVIN= 0 V, see 4.3.1c, TC= +25C 4
35、10 pF Quiescent supply current ICCVIN= VCCor GND, IOUT= 0.0 A 5.5 V 1, 2, 3 160 A Input leakage current IINVIN= VCCor GND 5.5 V 1, 2, 3 1.0 A Additional quiescent supply current, TTL input levels ICCAny one input, VIN = 0.5 V or 2.4 V Other inputs, VIN= VCCor GND IOUT= 0.0 A 5.5 V 1, 2, 3 3.0 mA Fun
36、ctional tests See 4.3.1d 7, 8 Propagation delay time, A, B, C to Yn tPHL1, tPLH1CL= 50 pF See figure 4 4.5 V 9 36 ns 10, 11 54 Propagation delay time, G1, G2A, G2B to Yn tPHL2, tPLH24.5 V 9 40 ns 10, 11 60 Output transition time tTLH, tTHL3/ 4.5 V 9 15 ns 10, 11 22 1/ For power supply of 5 V 10 perc
37、ent, the worst case output voltages (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ VIHand VILtests are not required and shall be applied as forcing functions for VOHor V
38、OLtests. 3/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89745 DLA LAND AND MARITIME COLUMBUS, OHIO 432
39、18-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines E 2 Terminal number Terminal symbol Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A B C G2A G2B G1 Y7 GND Y6 Y5 Y4 Y3 Y2 Y1 Y0 VCC - - - - - - - - - - - - NC A B C G2A NC G2B G1 Y7 GND NC Y6 Y5 Y
40、4 Y3 NC Y2 Y1 Y0 VCCNC = No internal connection FIGURE 1. Terminal connections. Inputs Outputs Enable Select G1 G2A G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X H X X X X L L L L L L L L X X H X X X L L L L L L L L L X X X X X L L L L L L L L H L L L L L H L L L L L L L H L L L L H L H L L L L L L H L L L H
41、L L L H L L L L L H L L L H H L L L H L L L L H L L H L L L L L L H L L L H L L H L H L L L L L H L L H L L H H L L L L L L L H L H L L H H H L L L L L L L H L = Low voltage level H = High voltage level X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking
42、permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89745 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS
43、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89745 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CL = 50 pF or equivalent, includes test jig and probe capacitance. 2. Input signal from pulse generator: VIN= 0.0 V to 3.0 V; PRR 1 MHz; ZO= 5
44、0; tr= 6.0 ns; tf= 6.0 ns; trand tfshall be measured from 0.3 V to 2.7 V and from 2.7 V to 0.3 V, respectively; duty cycle = 50 percent. 3. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo repr
45、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89745 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in acc
46、ordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test
47、 condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable,
48、in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - Final electrical test parameters (method 5004) 1*, 2,
