1、* .% DESC-DWG-90513 59 7797995 0021048 b REVISIONS DESCMPION t DATE (YR-MO-DA) APPROVED t- STANDARDIZED :OR USE BY ALL DEPARTMENTS AND AGENCIES OF THE 27 APRIL 1990 A 67268 5962-905 13 OF REVISION LEVEL I I OF 20 AMSC NIA SHEET 1 *US. GOVERHMfNT PRINTING ffKf: 1987 - 748-1291MW1 I ESC FORM 193 ZEF 3
2、 5962-El629 DISTRIBUTION STATEMENT A. Approved for public release; distribulion is unlimited. I Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-_ DESC-DWG-70513 59- 7777775 0023047 SIZE A STANDARDIZED i 5962-90513 1. SCOPE 1.1 a. This drawing describ
3、es device requirements for class B microcircuits in accordance qith 1.2.1 of MIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant ion-JAN devices“. 1.2 Part number, The complete part number shall be as shown in the following example: MILITARY DRAWING MFEEISE ELECTRONICS
4、SUPPLY CENTER DAYlN, OHIO 45444 5962-90513 I SHEET REVISION LEVEL 2 o1 1 +- I tase outline I I Drawing number Device type (1.2.11 (1.2.2) X -I I I I Lead finish per MIL-M-38510 1.2.1 Device types, The device types shall identify the circu. ;.function as follows: Device type Generic number Circuit fu
5、nction o1 AM29833A Parity bus transceivers with register option o2 03 AM29853A AM29855A Parity bus transceivers Parity bus transceivers with latch option 1.2.2 Case outlines, The case outlines shall be as designated in appendix C of MIL-M-38510, and is follows: Outline letter Case outline K L 3 F-6
6、(24-lead ,640“ x .460“ x .09“), flat package D-9 (24-lead 1.280“ x ,310“ x .200“), dual line package C-4 (28 terminal .460“ x ,460“ x.lOO“), square leadless chip carrier 1.3 Absolute maximum ratings. Supply voltage range - - - - - - - -. - - -. - Input voltage range - - - - - - - ., - - - - Output v
7、oltage range - - - - - - - -. - - - - Storage temperature range - - - - - - - - - Maximum power dissipation (PD) I/- - - - - - Lead temperature (soldering, 10 seconds) - - Thermal resistance, junction-to-case (0jc): Junction temperature (TJ)- - - - - - - - - - DC input current - - - - - - - - - - -
8、- - DC output current-. - - - - - - - - - - - - - -0.5 V to t7.0 V -0.5 V to +5.5 V -1.5 V to +6.0 V -65C to +15OoC 1.16 W +3OO0C See MIL-M-38510, appendix C +15OoC -30 mA to +5.0 mA 100 mA 1.4 Recomnended operating conditions. Supply voltage (V cl - - - Minimum high-leve? input voltage (VI - - 2.0
9、V Maximum low-level input voltage (VIL! - - - 0.7 V Case operating temperature range (TC) - - - 45C to +125OC - - - - - - - - +4.5 V to +5.5 V must withstand the added PD due to short circuit test e.g., ISC. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH
10、S-,-,-. MILITARY DRAWING MFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHK) 45444 DESC-DWG-70513 57 = 7777775 0021050 4 Al I 5962-90513 REVISION LEVEL SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standard, and bulletin. Unless otherwise specified, the ollowing specification, standard, an
11、d bulletin of the issue listed in that issue of the iepartment of Defense Index of Specifications and Standards specified in the solicitation. form a ,art of this drawing to the extent specified herein. SPECIFICATION MILITARY MIL-M-38510 - Microcircuits, General Specification for. STANDARD MILITARY
12、MIL-STD-883 - Test Methods and Procedures for Microelectronics. BULLETIN MIL ITARY MIL-BUL-103 - List of Standardized Military Drawings (SMDs). (Copfes of the specification, standard, and bulletin required by manufacturers in connection rith specific acquisition functions should be obtained from the
13、 contracting activity or as lirected by the contracting activity. 1 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the eferences cited herein, the text of this drawing shall take precedence. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirem
14、ents shall be in accordance with 1.2.1 of IIL-ST-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices“ nd as specified herein. 3.2 Design, construction, and physical dimensions. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure
15、1. 3.2.2 Truth tables. The truth tables shall be as specified on figure 2. 3.2.3 Logic diagrams. The logic diagrams shall be as specified on figure 3. 3.2.4 Test circuit and switching waveforms. The test circuit and switching waveforms shall be IS specified on figure 4. 3.2.5 Case outlines. The case
16、 outlines shall be in accordance with 1.2.2 herein. The design, construction, and physical imensions shall be as specified in MIL-M-38510 and herein. STANDARDIZED I SIZE I I Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-3.3 EEectricaK performance c
17、haracteristics. Unless otherwise specified herein, the electrical ?erormanee characteristics are as specified in table I and apply over the full case operating tempera.Wre range. ;peci%ied fn table II. The electrical tests for each subgroup are described in table I. 3.4 Eleetr-fcaT test reqkirements
18、. The elrectrical test requirements shall be the subgroups 3.5 Markins. Marking shall be in accordance with MIL-STD-883 (see 3.1 herein)- The part shal In addition, the manufacturers part number )e marked ttb the part number listed in 1.2 heretn. fia$ ource of supply shall aform that the manufacture
19、rs product meets the requirements of IIt-SD-883 hee 3.1 herein) and the requirements herein, 3.1 herein) shalt be provided with each lot of microcircuits detivered to this drawing. 3.1 Certificate af conformance. A certificate of conformance as required in ML-STD-883 (see 3.8 Notification of chan e.
20、 Notification of change to DESC-ECC shall be requ;fred in accordance ri th MI-PTU-tlSJ (see 3.1 herein) 3.9 Veriflcatiort and review. DESC, OESCs agent, and the acquiring activity retain the option ;a review the manufacturers facility and applicable required documentatian, Offshare lacumentation sha
21、TT be made available onshore at the aption of the revfewev, 4. QUALITY ASSURANCE PROVISIONS 4.1. Sampling and inspection. 42 Screenrn . Screening, shall be in accordance wSth method 5004 of WIL-STD-883. and shall be Samplfng and inspection procedures shiH be in accordance with ,ection 4 of MIL .e- M
22、 38510 ta the extent specified in MIL-STD-883 (see 3.1. herefn). onductd devices prior to quality confamance inspection. The following addition, TS, IVIN = 2.7 V = 5.5 V IParity I VC IRi, Ti, IVIN = 0.4 V = !i5 v (Parity I I I I I Unit: Group A IDevicel Limits ;ubgroupsl type I I IiI I I Min I Max I
23、 l I I I I I I I 1,2,3 I 01 I I 100 I UA I I I I I I l I I I I I 1.2.3 i All I i 150 I UA 1,2,3 l02,03 i i 100 I pA I I I I I I I I I I I I I I I I 150 I UA 1,2,3 I All I I I I I I I I I I I I I + 1,2,3 I All I I 100 I UA 1,2,3 I All I I -550 I PA I I I I I I I I I I I I 1,2,3 I All I -75 I -250 I m
24、A I I I vcc = 5.5 v IOutputs low I 1,293 i I IOutputs High I 1 I I I I I Outputs in high I limpedance state I I I I I Al 1 I I 100 I UA I I I I 180 I mA I I I I 1- I 155 I mA I I I 170 I mA I I I I All I I- I 1-1- I c ee footnotes at end of table. . Provided by IHSNot for ResaleNo reproduction or ne
25、tworking permitted without license from IHS-,-,-i I STANDARDIZED MILTTAW DRAWING DESC-DWG-70533 57 7777775 0023054 3 = SIZE 5962-90513 A TABLE 1. Electrical perfonnance characteristics - Continued. I I Test ISymbol I Conditions I I -55C 5 TC 5 +125C I I unless otTierwisF specified I I 4.5 v vcc 5.5
26、v Propagation delay tpLH L = 50 pF R1 = 500a Ri to Ti, I IR2 = 500Q Ti to Ri I I I See figure 4 I I I Propagation delay ItpHL I Ri to Ti, 1 I 1 I Ti to Ri I I Propagation delay ItpLH I Ri to Parity I 1 I I I I Propagation delay ItpHL I Ri to Parity I I Group A (Device! Limits I Unit subgroups1 type
27、I I III I I Min I Max I I I I I I l I 14 I ns 9,10,11 I All I I I I I 9,10,11 I All I I 14 I ns I I I I I I I I I I I I 9,10,11 I All I I 20 I ns I I I I I I I I I I t I I I 9,10,11 I All I I 20 I ns I I I I I I I I I I I I I I I I I I I I I I I Propagation delay ItpHL ICL = 50 pF, Ri E 500n I 9,10,
28、11 I All I I 16 I ns I I I I I Te figure I I CLK to ERR lO Ins Propagation delay ItpLH I I 9,10,11 I All I I I I I I CLR ta ERR l I I I I I I I I I I I I I I - Propagation delay ItpLH ICL = 50 pF, RI= 500n IR = 500 I5 ee fisure 4 I UER to Parity I I I Propagation delay ItpHL I I I I I Output enable
29、time !tpZH ! I I - OER to Parity m,mto I I Ri, Ti, Parity I I l I I 9,10,11 I All I I I I I I I I 20 I ns I I I I I I I I I I I I 9,10,11 I All I I 20 I ns I I I I I I I I II I I I 9,10,11 I All I I 16 I I I I I ns I I Output enable Time ItpZL I I 9,10,11 I All I - I I I I I I l6 I ns OER, OET to I
30、I I I I I I Ri, Ti, Parity I I I I I I I iee footnotes at end of table. DEFENSE ELECTRONICS SUPPLY CENTER REVISKiN LEVEL SHEET I 7 DAYTON, OH0 45444 *U. S. GOVERNMENT PRIHTING OFFNE 1988-54B-Wi DESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license
31、 from IHS-,-,- - DESC-DWG-70533 59 9 7777q75 0023055 3 9 TABLE I. Electrical performance characteristics - Continued. - I I I I I I I I I I I I unless ot?krwise specified I I I Min I Max I I f Unit Test ISymbol I Condi ti ons I Group A IDevicel Limits -55C 5 TC 5 +125“C Isubgroupc I type I 4.5 v vc
32、5 5.5 v I I IiI d I I I l I I I I ISee figure 4 I I I I I Ti, Parity to mI I I I I I I (Pass mode only) I I l I I I I I I I I I I I I I I I I I I I I I I I I I Output disable time!tpHt !CL = 50 pF, Ri = 500n I 9,10,11 I All I I 16 ns IR2 500n I I I I I DER, m to I ISee figure 4 I I I I I I I I I I R
33、i, fi, Parity 1 I I I I I I I I I I I I Output disable timeltpLt I I 9,10,11 I All I i 16 I ns I I I I I I I I I I I I I I I I I I I I ! 25 I ns Propagation delay ItpLH IC1 = 50 pF, R1 = 500n I 9,10,11 I 02,031 -+4 Propagation delay ItpHL I I 9,10,11 I 02,031 I 20 I ns I I I Ti, Parity to l I I I (P
34、ass mode only) I I I I I I I I m, OET to I Ri, fi, Parity I I Setup tlrne it, ICL = 50 pF, RI = 500n I 9,10,11 I All I 16 I I ns fi, Parity to CLKI ISee figure 4 ?/ I I I I I I I I I Hold tlme Ith I I 9,10,11 I All I O I I ns Ti, Parity to CLKI I I I I I I 1 I I I I I I I I I I CLR(C1IR) to CLK I IS
35、ee figure 4 I I I I I - - I I I I I I I I l I jetup time Its ICL = 50 pF, RI = 500n I 9,10,11 I o1 I 20 I thigh) I Pee figure - I I I 9,10,11 I All I 9.5 I ns I I 1 (low) I I I I :LK pulse width ItpWH ICL = 50 pF, R1 = 500 3/ I I I I I I Ins :LK pulse width /tpWL I I 9,10,11 I All I 9.5 I I I I I I
36、I !e footnotes at end of table. SIZE MILITARY DRAWING r A 5962-90513 STANDARDIZED BISFIWSE ELErxllONm SUPPLY CENTER REVICIOIJ LEVU SHEET mrn,m45499 8 SC FORM 193A * EP a7 itU.S. GOVERNMENT PRINTING OFFICE: 1W-54s-901 Provided by IHSNot for ResaleNo reproduction or networking permitted without licens
37、e from IHS-,-,-. . STANDARDIZED SIZE MILITARY DRAWING A TABLE I. Electrical performance characteristics - Continued. I I I l I I i Unit Test ISymbol I Conditions I Group A IDevicel Limits I I -55C 5 TC 5 +125“C Isubgroupsl type I I 1 4.5 v vc 5.5 v I I I I I I I unless otTierwisF specified I I I Min
38、 I Max I I I I I I I I I I CLR pulse width ItpWL ICL = 50 pF, R1 = 500n I 9,10,11 I All I 9.5 I I ns ISee figure 4 I I I I I Functional testing 1 ISee 4.3.1.C I 7,8 I All I I I I I I - 1/ Input thresholds are tested in combination with other dc parameters or by correlation. - 2/ Not more than one ou
39、tput shorted at a time. Duration should not exceed one second. - 3/ Far device types 02 and 03, replace CLK with W. 5962-90513 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with tethod ?i005 of MIL -STD-883 including groups A, B, C, and D inspections. ,rit
40、eria shall apply. The following additional 4.3.1 a. b. C. 4.3.2 a. b. Group A inspection. Tests shall be as specified in table II herein. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. Subgroups 7 and 8 shall include verification of the truth table on figure 2. Groups
41、 C and D inspections. End-point electrical parameters shall be as specified in table II herein. Steady-state 1 ife test conditions, method 1005 of MIL-STD-883. (1) Test condition A using the circuit submitted with the certificate of compliance (see 3.6 herein) . (2) TA = +125“C, minimum, (3) Test du
42、ration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. t U. S. GOVERNMENT PRINTING OFFICE: i888-548-9M SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-_- DESC-DWG-7055L3 57 7777775 0023057 7 SIZE A STANDARDIZED - Device type O
43、1 5962-90513 Case outlines K and L Case autline 3 23 3 To 22 3Ti 21 3T2 202 3 i9 = T4 18 3T5 17 7 16 7T7 I5 7 PARITY a GND Device types 02 and O3 Case-outlines K and L Case outline 3 12 13 14 15 16 IT 18 a a FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking p
44、ermitted without license from IHS-,-,-4 . STANDARDIZED CIZE MILITARY DRAWING A Device type O1 Register option Inputs outputs I I I- 1- I I ! I !Sum of i I Sum of Hs I I i II l I IOET IOERICLRICLK IRi 1“s of ITj I(Ti + Parity) Ri ITj IParitylm I Functions IL IHlXIX I H IOdd INA 1 NA I NA I H I L I NA
45、 ITransmit mode: IL IHlXlX I H /Even INA I NA I NA I H I H I NA Itransmits data IL IHlXlX I L IOdd INA I NA I NA I L I L I NA Ifrom R port to T IL IHlXlX I L IEven INA I NA I NA I L I H I NA Iport, generating IlIII I II III I Iparity. Receive IlIII I I I III I (path is disabled. IH ILIHI4 INA I NA I
46、 H I Odd 1 H I NA I NA I H IReceive mode: IH ILIHI4 INA I NA I H I Even I H I NA I NA I L Itransmits data IH ILIHI INA I NA I L I Odd I L I NA I NA I H Ifrom T port to R IH ILIHI1 INA I NA I L I Even I L I NA I NA I L (port with parity IIIII I I I III I Itest resulting in IlIII I II III I terror fla
47、g. I III I I I ITransmit path is IIIIt I I I III I (disabled. II I I I I IX IXlLlX I x I x I x I X I X I X I X I H IClear error flag III11 I I I III I Iregister. tII11 I II III II IH IHIHIX I X I X I X I X I Z I Z I Z I * IBoth transmitting IH IHILIX I X I X I X I X I Z I Z I Z I H land receiving I
48、Ipaths are IIIII I I I III ItIII I II Il I I Idisabled. IIIII I II Ill I I IH IHIHl4 I L :Odd X I X I Z I Z I Z I H IParity logic de- IH IHtHI4 I H IEven I X I X I Z I Z I Z I L Ifaults to transmii IL ILlXlX I H IOdd INA I NA I NA I H I H I NA Imode. Forced- IL ILlXlX I H IEven INA I NA I NA I H I L
49、 I NA lerror checking. IL ILlXlX I L IOdd INA I NA INA I L I H INAI IL ILlXlX 1 L IEven INA I NA INA I L I L INA) I III I IR I I I IIIII I II III II IlIII I II III II I III11 I I I III II 5962-90513 FIGURE 2. Truth tables. m ii U. S. UOVERHMENT PRINTING OFFICE 1888-550-547 DESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted
