DLA SMD-5962-90625 REV B-2012 MICROCIRCUIT DIGITAL BIPOLAR CMOS OCTAL BUFFER AND LINE DRIVER WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

上传人:progressking105 文档编号:699788 上传时间:2019-01-01 格式:PDF 页数:14 大小:194.58KB
下载 相关 举报
DLA SMD-5962-90625 REV B-2012 MICROCIRCUIT DIGITAL BIPOLAR CMOS OCTAL BUFFER AND LINE DRIVER WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第1页
第1页 / 共14页
DLA SMD-5962-90625 REV B-2012 MICROCIRCUIT DIGITAL BIPOLAR CMOS OCTAL BUFFER AND LINE DRIVER WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第2页
第2页 / 共14页
DLA SMD-5962-90625 REV B-2012 MICROCIRCUIT DIGITAL BIPOLAR CMOS OCTAL BUFFER AND LINE DRIVER WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第3页
第3页 / 共14页
DLA SMD-5962-90625 REV B-2012 MICROCIRCUIT DIGITAL BIPOLAR CMOS OCTAL BUFFER AND LINE DRIVER WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第4页
第4页 / 共14页
DLA SMD-5962-90625 REV B-2012 MICROCIRCUIT DIGITAL BIPOLAR CMOS OCTAL BUFFER AND LINE DRIVER WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第5页
第5页 / 共14页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw the switching waveforms in figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 06-03-28 Thomas M. Hess B Update boilerplate to MIL-PRF-38535 requirements. Edit

2、orial changes throughout jak. 12-04-19 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIR

3、CUIT DRAWING CHECKED BY Thomas J. Ricciuti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, OCTAL BUFFER AND LINE DRIVER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE

4、DRAWING APPROVAL DATE 90-10-11 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-90625 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E219-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90625 DLA LAND AND M

5、ARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes a

6、re available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90625 01 M R A Federal stock class designator RHA designator (see 1.2.1

7、) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device cla

8、ss M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01

9、 54BCT244 Octal buffer and line driver with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the r

10、equirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive desi

11、gnator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by

12、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc

13、to +7.0 V dc Input voltage range (VIN) -0.5 V dc to +7.0 V dc Voltage applied to any output in the high state (VOUT) . -0.5 V dc to VCCVoltage applied to any output in the disabled state (VOUT) . -0.5 V dc to +5.5 V dc Current into any output in the low state . 96 mA Input clamp current (IIK) . -30

14、mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 651 mW 2/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC)

15、+4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc Maximum high level output current (IOH) -12 mA Maximum low level output current (IOL) +48 mA Ambient operating temperature range (TA) -55C to +125C 1/ Stresses above the absolute

16、 maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Must be able to withstand the additional PDdue to the short circuit test, e.g., IOS. The PDlimit is based upon dc values. Provided by IHSNot for Resal

17、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The fol

18、lowing specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing

19、, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcir

20、cuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawi

21、ng and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and

22、 V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be

23、in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535,

24、appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic dia

25、gram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the e

26、lectrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SI

27、ZE A 5962-90625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking.

28、The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA produ

29、ct using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device class

30、es Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufactur

31、er in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA

32、 Land and Maritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Ce

33、rtificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device clas

34、s M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime s age

35、nt, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by

36、this drawing shall be in microcircuit group number 126 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B S

37、HEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V VIH= 2.0 V VIL= 0.8 V IOH= -3 mA 1, 2, 3 All 2.4 V IOH= -12 mA

38、2.0 Low level output voltage VOLVCC= 4.5 V VIH= 2.0 V VIL= 0.8 V IOL= +48 mA 1, 2, 3 All 0.55 V Input clamp voltage VIKVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.2 V High level input current IIH1VCC= 5.5 V, VIN= 7.0 V 1, 2, 3 All 0.1 mA IIH2VCC= 5.5 V, VIN= 2.7 V 20 A Low level input current IILVCC= 5.5

39、 V, VIN= 0.5 V 1, 2, 3 All -1.0 mA Short-circuit output current 1/ IOSVCC= 5.5 V, VOUT= 0.0 V 1, 2, 3 All -100 -225 mA Supply current, outputs high ICCHVCC= 5.5 V, outputs open 1, 2, 3 All 40 mA Supply current, outputs low ICCL80 Supply current, outputs disabled ICCZ10.0 Off-state output current, hi

40、gh level voltage applied IOZHVCC= 5.5 V, VOUT= 2.7 V 1, 2, 3 All 50 A Off-state output current, low level voltage applied IOZLVCC= 5.5 V, VOUT= 0.5 V 1, 2, 3 All -50 A Functional tests 2/ See 4.4.1b 7, 8 All Propagation delay time, mAn to mYn tPLHCL= 50 pF R1 = R2 = 500 See figure 4 VCC= 5.0 V 9 All

41、 1.2 4.4 ns VCC= 4.5 V and 5.5 V 10, 11 0.9 5.3 tPHLVCC= 5.0 V 9 All 1.7 5.0 VCC= 4.5 V and 5.5 V 10, 11 1.4 6.0 Propagation delay time, output enable, mOEto mYn tPZHVCC= 5.0 V 9 All 2.0 7.8 ns VCC= 4.5 V and 5.5 V 10, 11 2.0 9.0 tPZLVCC= 5.0 V 9 All 2.0 8.1 VCC= 4.5 V and 5.5 V 10, 11 2.0 9.4 Propa

42、gation delay time, output disable, mOEto mYn tPHZVCC= 5.0 V 9 All 2.0 6.7 ns VCC= 4.5 V and 5.5 V 10, 11 2.0 8.0 tPLZVCC= 5.0 V 9 All 2.0 7.6 VCC= 4.5 V and 5.5 V 10, 11 2.0 9.8 See footnotes on next sheet. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

43、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. 1/ Not more than one output should be shorted at one time and the duration of the test condit

44、ion shall not exceed one second. 2/ Functional tests shall be conducted at input test conditions of 0.4 V VIL 0.8 V and 2.0 V VIH 2.4 V for VCC= 4.5 V and is repeated for VCC= 5.5 V. Device type All Case outlines R, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1

45、8 19 20 1OE1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 2A1 1Y4 2A2 1Y3 2A3 1Y2 2A4 1Y1 2OEVCCFIGURE 1. Terminal connections. Each buffer Inputs Output OEA Y H X Z L L L L H H H = High voltage level L = Low voltage level Z = High-impedance state X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for Re

46、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking

47、permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted w

48、ithout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. When measuring tPLZ and tPZL: S1 = 7.0 V. When measuring tPLH, tPHL, tPZH, and tPHZ: S1 = Open. 2. The tPZLand tPLZreference waveform is for the output under test with internal conditions such that the output is at VOLexcept when disabled by the output enable control. The tPZHand tPHZre

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1