DLA SMD-5962-91697 REV E-2008 MICROCIRCUIT DIGITAL CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER WITH 32K BYTES OF EPROM PROGRAM MEMORY MONOLITHIC SILICON《数字单硅片微电路 由互补高性能金属氧化物半导体结构组成 带单芯.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R234-94 94-07-14 Monica L. Poelking B Add device types 03 and 04. Add case outlines N and Y. Editorial changes throughout. 96-09-03 Monica L. Poelking C Correct IOHconditions for VOHand the limits for VOH1in ta

2、ble I. Correct symbols, definitions, and functional descriptions in section 6.5. Update boilerplate to MIL-PRF-38535 requirements. CFS 02-05-10 Thomas M. Hess D Add case outline letter 4. CFS 03-06-06 Thomas M. Hess E Update boilerplate to current MIL-PRF-38535 requirements. Correct descriptive desi

3、gnator for case outline letter 4 in paragraph 1.2.4. CFS 08-07-15 Thomas M. Hess REV SHEET REV E E E E E E E E E E E E E SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 REV E E E E E E E E E E E E E E REV STATUS OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Christopher A. Rauch

4、CHECKED BY Thomas M. Hess DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 92-10-07 MICROCIRCUIT, DIGITAL, CHMOS SINGLE-CHIP, 8-BIT MICROCONTROLLER WITH 32K BYTES OF EPROM PROGRAM MEMORY, MONOLITHIC SILICON SIZE A CA

5、GE CODE 67268 5962-91697 STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A REVISION LEVEL E SHEET 1 OF 27 DSCC FORM 2233 APR 97 5962-E354-08 Provided by IHSNot for ResaleNo reproduction or networking permitted withou

6、t license from IHS-,-,-SIZE A 5962-91697 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents three product assurance class levels consisting of space application (device class

7、 V), high reliability (device classes M and Q), and nontraditional performance environment (device class N). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is r

8、eflected in the PIN. For device class N, the user is cautioned to assure that the device is appropriate for the application environment. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91697 01 M X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Devic

9、e class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes N, Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet

10、 the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 87C51FC High performance CH

11、MOS single chip 8-bit microcontroller or with 32K bytes user programmable EPROM 87C51RC 1/ 02 87C51FC-16 High performance CHMOS single chip 8-bit microcontroller or with 32K bytes user programmable EPROM 87C51RC-16 1/ 03 87C51FC High performance CHMOS single chip 8-bit microcontroller with 32K bytes

12、 user programmable EPROM 04 87C51FC-16 High performance CHMOS single chip 8-bit microcontroller with 32K bytes user programmable EPROM 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements do

13、cumentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A N Certification and qualification to MIL-PRF-38535 with a nontraditional performance environment (encapsulated in plastic) Q or V Ce

14、rtification and qualification to MIL-PRF-38535 _ 1/ Use of this die may require additional programming. Contact the device manufacturer for details. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-91697 STANDARD MICROCIRCUIT DRAWING DEFEN

15、SE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835, JEDEC Publication 95, and as follows: Outline letter Descriptive designator Terminals Package style Document M GQCC1-J44 44

16、 Ceramic chip carrier, MIL-STD-1835 J-leaded package 1/ T See figure 1 44 Ceramic chip carrier, J-leaded package 1/ U CQCC1-N44 44 Square chip carrier package 1/ MIL-STD-1835 X GDIP1-T40 or CDIP2-T40 40 Dual-in-line package 1/ MIL-STD-1835 Z See figure 1 44 Ceramic chip carrier, gullwing-leaded pack

17、age 1/ Y MS-018-AC 44 Plastic chip carrier, J-leaded JEP 95 N MS-011-AC 40 Plastic dual-in-line package JEP 95 4 CQCC2-J44 44 Ceramic chip carrier, MIL-STD-1835 J-leaded package 2/ 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes N, Q, and V or MIL-PRF-38535, ap

18、pendix A for device class M. 1.3 Absolute maximum ratings. 3/ Storage temperature range -65C to +150C Voltage on EA/VPPpin to VSS. 0.0 V dc to +13.0 V dc Voltage on any other pin to VSS-0.5 V dc to +6.5 V dc Maximum IOL per I/O pin. 15 mA Power dissipation (PD) . 1.5 W 4/ Lead temperature (soldering

19、 10 seconds) 265C Thermal resistance, junction-to-case (JC): Case U, X, and M . See MIL-STD-1835 Case T, Z, and N 14C/W Case Y 15C/W Endurance 50 cycles/byte, minimum Data retention 10 years, minimum 1.4 Recommended operating conditions. Supply voltage (VCC) +5.0 V dc 20% Oscillator frequency . 3.5

20、MHz to 16 MHz Case operating temperature range (TC): Device types 01 and 02 -55C to +125C 5/ Device types 03 and 04 -40C to +85C 5/ _ 1/ Lid shall be transparent to permit ultraviolet light erasure. 2/ Non-windowed package. 3/ Stresses above the absolute maximum rating may cause permanent damage to

21、the device. Extended operation at the maximum levels may degrade performance and affect reliability. 4/ Power dissipation based on package heat transfer limitations, not device power consumption. 5/ Case temperatures are instant on. Provided by IHSNot for ResaleNo reproduction or networking permitte

22、d without license from IHS-,-,-SIZE A 5962-91697 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standard

23、s, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. D

24、EPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of thes

25、e documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following documents form a part of this documen

26、t to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEP 95 - Registered and Standard Outlines for Semiconductor Devices (Copies of this document are available online at www.

27、jedec.org/ or from the Electronics Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however

28、, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes N, Q, and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufactur

29、ers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2

30、Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes N, Q, and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance

31、with 1.2.4 herein and figure 1 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2 herein. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3 herein. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit

32、shall be as specified on figure 4 herein. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case

33、 operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-91697 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 3.4 Electrical test

34、requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages whe

35、re marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes N, Q, and V shall be in accordance with

36、MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes N, Q, and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as r

37、equired in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes N, Q, and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of comp

38、liance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meet

39、s, for device classes N, Q, and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes N, Q, and V in MIL-PRF-38535 or for device clas

40、s M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any

41、 change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at

42、 the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). 3.11 Processing EPROMS. All testing requirements and quality assurance provisions herein shall

43、 be satisfied by the manufacturer prior to delivery. 3.11.1 Erasure of EPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.5 herein. 3.11.2 Programmability of EPROMS. When specified, devices shall be programmed in accordance with the s

44、pecified pattern using the procedures and characteristics specified in 4.6 herein and table III. 3.11.3 Verification and erasure of programmability of EPROMS. When specified, devices shall be verified as either programmed to the specified pattern using the procedures and characteristics specified in

45、 4.6 and table III, or erased. As a minimum, verification shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. Provided

46、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-91697 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Tes

47、t Symbol Conditions 1/ 4.0 V VCC 6.0 V VSS= 0.0 V unless otherwise specified Group A subgroupsDevice type Min Max Unit Input low voltage VIL 1, 2, 3 All -0.5 2/ 0.2VCC-0.1 V Input high voltage (except XTAL1, RST) VIH 1, 2, 3 All 0.2VCC+0.9 VCC+0.5 2/ V Input high voltage (XTAL1, RST) VIH1 1, 2, 3 Al

48、l 0.7VCC VCC+0.5 2/ V IOL= 100 A 4/ 0.3 IOL= 1.6 mA 0.45 Output low voltage (ports 1, 2, 3) 3/ VOL IOL= 3.5 mA 1, 2, 3 All 1.0 V IOL= 200 A 4/ 0.3 IOL= 3.2 mA 0.45 Output low voltage (port 0, ALE, PSEN) 3/ VOL1 IOL= 7.0 mA 1, 2, 3 All 1.0 V IOH= -10 A VCC -0.3 IOH= -30 A VCC -0.7 Output high voltage

49、 (ports 1, 2, 3, ALE, PSEN) VOH IOH= -60 A 1, 2, 3 All VCC-1.5 V IOH= -200 A 5/ VCC -0.3 IOH= -3.2 mA VCC-0.7 Output high voltage (port 0, in external bus mode) VOH1 IOH= -7.0 mA 1, 2, 3 All VCC-1.5 V Logical 0 input current (ports 1, 2, and 3) IIL VIL= 0.45 V 1, 2, 3 All -75 A Input leakage current (port 0) I

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