DLA SMD-5962-92069 REV A-2012 MICROCIRCUIT MEMORY DIGITAL CMOS 4K X 9 PARALLEL-TO-SERIAL FIFO MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated to current boilerplate requirements. lhl 12-12-03 Charles F. Saffle THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV A A A A A A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 REV STATUS REV

2、A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Tuan Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPAR

3、TMENT OF DEFENSE CHECKED BY Jeff Bowling APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 9 PARALLEL-TO-SERIAL FIFO, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-08-31 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-92069 SHEET 1 OF 29 DSCC FORM 2233 APR 97 5962-E046-13 Pro

4、vided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents three product assur

5、ance class levels consisting of space application (device class V), high reliability (device class M and Q). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is r

6、eflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 92069 01 M X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA design

7、ator. Device classes Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) in

8、dicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic 1/ Circuit function Access time 01 4K x 9-bit parallel-to-serial FIFO 120 ns 02 4K x 9-bit parallel-to-serial FIFO 80 ns 03 4K x 9-bit parallel-to-serial FIFO 65 ns 04 4K

9、x 9-bit parallel-to-serial FIFO 50 ns 05 4K x 9-bit parallel-to-serial FIFO 40 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requir

10、ements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designato

11、r Terminals Package style X CDIP2-T28 28 Dual-in-line Y CDFP3-F28 28 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q, and V or MIL-PRF-38535, appendix A for device class M. _ 1/ Generic numbers are listed on the Standard Microcircuit Drawing Bulleti

12、n at the end of this document. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings

13、. 2/ 3/ Terminal voltage range with respect to ground -0.5 V dc to +7.0 v dc DC output current (IOUT) . 50 mA Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Maximum power dissipation (PD). . 1.0 Wa

14、tt Junction temperature (TJ) . +175C 4/ 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc Supply voltage (VSS) 0.0 V dc High level input voltage (VIN) 2.2 V dc minimum Low level input voltage (VIL) 0.8 v dc maximum 5/ Case operating temperature range (TC) -55C t

15、o +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or c

16、ontract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HA

17、NDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111

18、-5094.) _ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ All voltages referenced to VSS (VSS = ground) unless otherwise specified. 4/ Maximum junction temperature shal

19、l not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ Negative undershoots to a minimum of -1.5 V are allowed with a maximum of 10 ns pulse width. Provided by IHSNot for ResaleNo reproduction or networking permitted witho

20、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherw

21、ise specified, the issues of the documents are the issues of the documents cited in the solicitation. JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. (Copies of this document are available online at www.jedec.org/ or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suit

22、e 240-S, Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption ha

23、s been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q, and V shall be in accordance with MIL-PRF-38535 and as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not a

24、ffect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and

25、physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q, and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shal

26、l be as specified on figure 1. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limi

27、ts are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall

28、be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this o

29、ption, the RHA designator shall still be marked. Marking for device classes Q, and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q, and V sh

30、all be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q, and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order

31、to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Ma

32、ritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of

33、 conformance. A certificate of conformance as required for device classes Q, and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notifi

34、cation to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SI

35、ZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufactu

36、rers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-3853

37、5, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteris

38、tics. Test Symbol Conditions -55C TC +125C VSS = 0 V; 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Input leakage current ILI 0.4 V VIN VCC 1, 2, 3 All -10 10 A Output leakage current ILO SOCP VIL, 0.4 V VOUT VCC 1, 2, 3 All -10 10 A Output high voltage

39、 VOH IOUT = -8.0 mA 1, 2, 3 All 2.4 V Output low voltage VOL IOUT = 16 mA 1, 2, 3 All 0.4 V Power supply current ICC1 f = fS, outputs open, VCC = 5.5 V 1, 2, 3 All 160 mA Average standby current ICC2 W = RS = FL/RT = VIH, SOCP = VIL, outputs open 1, 2, 3 All 25 mA Power down current ICC3 RS = FL/RT

40、= W = VCC - 0.2 V, SOCP 0.2 V, all other inputs VCC - 0.2 V or 0.2 V, outputs open 1, 2, 3 All 4.0 mA Input capacitance CIN VIN = 0 V, f = 1.0 MHz, TA = +25C, see 4.4.1e 4 All 10 pF Output capacitance COUT VOUT = 0 V, f = 1.0 MHz, TA = +25C, see 4.4.1e 4 All 12 pF Functional test See 4.4.1c 7, 8A, 8

41、B All Parallel shift frequency fS CL = 30 pF, see figures 3 and 4 9, 10, 11 01 7.0 MHz 02 10 03 12.5 04 15 05 20 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND A

42、ND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C VSS = 0 V; 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Serial-out sh

43、ift frequency fSOCP CL = 30 pF, see figures 3 and 4 9, 10, 11 01 25 MHz 02 28 03 33 04 40 05 50 PARALLEL INPUT TIMINGS Data setup time tDS CL = 30 pF, see figures 3 and 4 9, 10, 11 01, 02 40 ns 03, 04 30 05 20 Data hold time tDH 9, 10, 11 01-03 10 ns 04 5.0 05 0 Write cycle time tWC 9, 10, 11 01 140

44、 ns 02 100 03 80 04 65 05 50 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97

45、 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C VSS = 0 V; 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max PARALLEL INPUT TIMINGS Continued. Write pulse width tWPW CL = 30 pF, see figures 3 and 4 9, 10, 1

46、1 01 120 ns 02 80 03 65 04 50 05 40 Write recovery time tWR 9, 10, 11 01, 02 20 ns 03, 04 15 05 10 Write high to EF high tWEF 9, 10, 11 01-02 60 ns 04 45 05 35 Write low to FF low tWFF 9, 10, 11 01-03 60 ns 04 45 05 35 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or ne

47、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C VSS = 0 V; 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max PARALLEL INPUT TIMINGS Continued. Write low to transitioning HF, AEF tWF CL = 30 pF, see figures 3 and 4 9, 10, 11 01 140 ns 02 100 03 80 04 65 05 50 Write pulse width after FF high tWPF 9, 10, 11 01 120 n

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