DLA SMD-5962-94559 REV B-2009 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL DUAL 4-INPUT NAND SCHMITT TRIGGER MONOLITHIC SILICON.pdf

上传人:explodesoak291 文档编号:700463 上传时间:2019-01-01 格式:PDF 页数:12 大小:123.09KB
下载 相关 举报
DLA SMD-5962-94559 REV B-2009 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL DUAL 4-INPUT NAND SCHMITT TRIGGER MONOLITHIC SILICON.pdf_第1页
第1页 / 共12页
DLA SMD-5962-94559 REV B-2009 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL DUAL 4-INPUT NAND SCHMITT TRIGGER MONOLITHIC SILICON.pdf_第2页
第2页 / 共12页
DLA SMD-5962-94559 REV B-2009 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL DUAL 4-INPUT NAND SCHMITT TRIGGER MONOLITHIC SILICON.pdf_第3页
第3页 / 共12页
DLA SMD-5962-94559 REV B-2009 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL DUAL 4-INPUT NAND SCHMITT TRIGGER MONOLITHIC SILICON.pdf_第4页
第4页 / 共12页
DLA SMD-5962-94559 REV B-2009 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL DUAL 4-INPUT NAND SCHMITT TRIGGER MONOLITHIC SILICON.pdf_第5页
第5页 / 共12页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R201-94. 94-06-02 Monica L. Poelking B Redrawn with changes. Update drawing to current requirements. Editorial changes throughout. - gap 09-12-10 Charles F. Saffle REV SHET REV SHET REV STATUS REV B B B B B B B

2、 B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED B

3、Y Thomas M. Hess APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, DUAL 4-INPUT NAND SCHMITT TRIGGER, MONOLITHIC SILICON DRAWING APPROVAL DATE 94-03-31 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-94559 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E369-09 Pro

4、vided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94559 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two produc

5、t assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA)

6、 levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 94599 01 Q C X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 R

7、HA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A das

8、h (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F13 Dual 4-input NAND Schmitt trigger 1.2.3 Device class designator. The device class designator is a single letter identifying the pr

9、oduct assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 C

10、ase outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 dual-in-line package D GDFP1-F14 or CDFP2-F14 14 flat package 2 CQCC1-N20 20 square chip carrier package 1.2.5 Lead finish.

11、The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94559 DEFENSE SUPPLY CENTER COLUMBU

12、S COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc Input voltage range (VIN) . -0.5 V dc to +7.0 V dc Input current range (IIN) . -30 mA to 5.0 mA Storage temperature range . -65C to +150C Le

13、ad temperature (soldering, 10 seconds) . +300C Junction temperature (TJ) . +175C Maximum power dissipation (PD) 2/ . 55 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc Maximum input clamp current, (

14、IIK) . -1.2 mA Maximum high level output current, (IOH) -1 mA Maximum low level output current, (IOL) 20 mA Input rise and fall times, (tr, tf) . 2.5 ns Positive going threshold, VT+ . 1.5 V to 2.0 V Negative going threshold, VT-0.5 V to 1.1 V Hysteresis (VT+-VT-) . 0.4 V minimum High level input vo

15、ltage (VIH) . 2.0 V Low level input voltage (VIL) 0.5 V Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein

16、. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcirc

17、uits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/

18、 or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document,

19、however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Maximum power dissi

20、pation is defined as VCCx ICCand must withstand the added PDdue to the short circuit output test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94559 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHI

21、O 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. Th

22、e modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical d

23、imensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connec

24、tions. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shal

25、l be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating

26、temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers P

27、IN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q

28、 and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for dev

29、ice class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device cla

30、ss M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the

31、 manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535

32、 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing

33、is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made a

34、vailable onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 30 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without

35、 license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94559 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C Group A subgroups Limits Unit unless oth

36、erwise specified Min Max High level output voltage Logical “1“ VOH1VCC= 4.5 V, VIL= 0.5 V, IOH= -1.0 mA 1, 2, 3 2.5 V Low level output voltage Logical “0“ VOL1VCC= 4.5 V, VIH= 2.0 V, IOL= 20 mA 1, 2, 3 0.5 V High level output voltage Logical “1“ VOH2VCC= 4.5 V, IOH= -1.0 mA 1/ 1, 2, 3 2.5 V Low leve

37、l output voltage logical “0“ VOL2VCC= 4.5 V, IOL= 20 mA 2/ 1, 2, 3 0.5 V Supply current ICCHVCC= 5.5 V, VIN= GND 1, 2, 3 8.5 mA ICCLVCC= 5.5 V, VIN= 5.5 V 1, 2, 3 10 mA Input clamp voltage VIKVCC= 4.5 V, II= -18 mA 1 -1.2 V High level input current IIH1VCC= 5.5 V, VIN= 2.7 V, all other inputs = 0 V

38、1, 2, 3 20 A IIH2VCC= 5.5 V, VIN= 7.0 V, all other inputs are GND 1, 2, 3 100 A Low level input current IILVCC= 5.5 V, VIN= 0.5 V, other inputs = 5.5 V 1, 2, 3 -0.03 -0.6 mA Short circuit output current IOSVCC= 5.5 V, VOUT= GND, 3/ all inputs are GND 1, 2, 3 -60 -150 mA Functional test VCC= 4.5 V an

39、d 5.5 V, See 4.4.1b 7, 8 Propagation delay, data output tPHLCL= 50 pF, RL= 500 , See figure 4. VCC= 5.0 V 9 4.5 13.5 ns VCC= 4.5 V and 5.5 V 10, 11 3.0 16.5 tPLH CC= 5.0 V 9 4.0 7.0 ns VCC= 4.5 V and 5.5 V 10, 11 3.0 11.0 1/ Momentary 0.5 V, then 1.5 V without overshoot during test. (0.5 V-1.5 V). 2

40、/ Momentary 2.0 V, then 1.1 V without undershoot during test. (2.0 V-1.1 V). 3/ Not more than one output should be shorted at a time. For testing IOS, the use of high speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal heating and more accurately refle

41、ct operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. Provided by IHSNot for ResaleNo reproduction or n

42、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94559 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline C and D 2 Terminal number Terminal symbol 1 A1 NC 2 B1 A1 3 NC B1 4 C1

43、NC 5 D1 NC6 Y1 C1 7 GND NC8 Y2 D1 9 A2 Y1 10 B2 GND 11 NC NC 12 C2 Y2 13 D2 A2 14 VCCB2 15 NC 16 NC17 NC 18 C219 D2 20 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94559

44、DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Inputs Outputs A B C D Y L X X X H X L X X H X X L X H X X X L H H H H H L H = High voltage level. L = Low voltage level. X = Irrelevant. FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided b

45、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94559 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. Pulse generator characteristics: PRR = 1 MHz, tr=

46、tf 2.5 ns duty cycle = 50 percent. 2. CL= 50 pF. 3. RL= 500 . 4. CLincludes probe and jig capacitance. 5. RT= Termination resistance should be equal to ZOUTof pulse generator. 6. VM= 1.5 V. FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking per

47、mitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94559 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shal

48、l be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For de

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1