1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 11-11-29 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE
2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Phu H. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, IEEE 1394a-2000 OHCI PHY/LIN
3、K LAYER CONTROLLER, MONOLITHIC SILICON YY MM DD 05-03-24 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/05605 REV A PAGE 1 OF 13 AMSC N/A 5962-V007-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBU
4、S COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05605 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance of an IEEE 1394a-2000 OHCI PHY/link layer controller microcircuit, with an operating temperature range of -40C to +85C. 1.2 Vendor Ite
5、m Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/05605 - 01 X E Drawing Device type Case outline Lead finish number (See 1.
6、2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). 1/ Device type Generic Circuit function 01 TSB43AB23A-EP IEEE 1394a-2000 OHCI PHY/Link-layer controller 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 128 JEDEC MO-136 P
7、lastic quad flatpack 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other _ 1/ Users are cautioned to review th
8、e manufacturers data manual for additional user information relating to these devices. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05605 REV A PAGE 3 1.3 Absol
9、ute maximum ratings. 2/ Supply voltage range: REG18 -0.2 V to +2.2 V AVDD. -0.3 V to +4.0 V DVDD. -0.3 V to +4.0 V PLLVDD. -0.3 V to +4.0 V VDDP-0.5 V to +5.5 V Input voltage range for PCI, VI, PHY, and miscellaneous -0.5 V to VDD+0.5 V Output voltage range for PCI , VO, PHY and miscellaneous -0.5 V
10、 to VDD+0.5 V Input clamp current, (IIK) (VIVDD) 20 mA 3/ Output clamp current, (IOK) (VOVDD) 20 mA 4/ Electrostatic discharge . HBM: 2 kV 5/ Continuous total power dissipation . See dissipation rating table Operating ambient temperature range, (TA) : TSB43AB21AI . -40C to +85C Storage temperature r
11、ange, (TSTG) -65C to +150C Lead temperature 1.6 mm (1/16 inch) from cage for 10 seconds . +260C Dissipation Rating Table Case outline TAVDDI. For PCI use VI VDDP. 4/ Applies to external output and bi-directional buffers. For 5-V tolerant use VO VDDI. For PCI use VO VDDP. 5/ HBM is human body model.
12、6/ Standard JEDEC high-K board. 7/ Standard JEDEC low-K board. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05605 REV A PAGE 4 1.4 Recommended operating conditi
13、ons. Test condition Min Max Unit REG 18 1.6 2.0 V Core voltage, AVDD3.0 3.6 V Core voltage, DVDD3.0 3.6 V Core voltage, PLLVDD2.7 3.6 V Output voltage, VOTTL and LVCMOS terminals 0 DVDDV PCI I/O clamping voltage, VDDPVDDP = 3.3 V 3.0 3.6 V VDDP = 5.0 V 4.5 5.5 High level input voltage, VIH8/ PCI 3.3
14、 V 0.475VDDPVDDPV 5.0 V 2.0 VDDPPC(0-2) 0.7 DVDDDVDDRST_G 0.6 DVDDDVDDMiscellaneous 9/ 2.0 VDDPLow level input voltage, VIL8/ PCI 3.3 V 0 0.325VDDPV 5.0 V 0 0.8 PC(0-2) 0 0.2 DVDDRST_G 0 0.3 DVDDMiscellaneous 9/ 0 0.8 Input voltage, VIPCI 3.3 V 0 VDDPV Miscellaneous 9/ 0 VDDPOutput voltage, VO10/ PC
15、I 3.3 V 0 DVDDV Miscellaneous 9/ 0 DVDDInput transition time (trand tf), tt0 6 ns Operating ambient temperature, TARJA= 70.82 C/W 85 C Output current, IOTPBIAS outputs -5.6 1.3 mA Differential input voltage, VIDCable inputs, during data reception 118 260 mV Cable inputs, during arbitration 168 265 C
16、ommon-mode input voltage, VICTPB cable inputs, source power node 0.4706 2.515 V TPB cable inputs, nonsource power node 0.4706 2.015 11/ Maximum junction temperature, TJ128-PDT high-K JEDEC board, RJA= 74.6 C/W, PD= 0.312 W TA= 85C 105 C 128-PDT low-K JEDEC board, RJA= 101.3 C/W, PD= 0.229 W TA= 85C
17、105 C _ 8/ Applies to external inputs and bi-directional buffers without hysteresis. 9/ Miscellaneous terminals are: GPIO2(90), GPIO3 (89), SDA (92), SCL (91). 10/ Applies to external output buffers. 11/ For a node that does not source power; see section 4.2.2.2 in IEEE Std 1394a-2000. Provided by I
18、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05605 REV A PAGE 5 1.4 Recommended operating conditions - Continued. Test condition Min Max Unit Power setup reset time, tpuRST_
19、G input 2 ms Receiver input jitter TPA, TPB cable inputs, S100 operation 1.08 ns TPA, TPB cable inputs, S200 operation 0.5 TPA, TPB cable inputs, S400 operation 0.315 Receiver input skew Between TPA and TPB cable inputs, S100 operation 0.8 ns Between TPA and TPB cable inputs, S200 operation 0.55 Bet
20、ween TPA and TPB cable inputs, S400 operation 0.5 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technolo
21、gy Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE) IEEE Standard 1394a-2000 - IEEE Standard for High Performance Serial Bus. (Copies of these documents are available online at http:/www.ieee.org or from the IEEE Serv
22、ice Center, 445 Hoes Lane, P.O. Box 1331, Piscataway, NJ 088551331. 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identificatio
23、n (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.
24、4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections s
25、hall be as shown in figure 2. 3.5.3 Block diagram. The block diagram shall be as shown in figure 3. 3.5.4 Test load diagram. The test load diagram shall be as shown in figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, C
26、OLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05605 REV A PAGE 6 TABLE I. Electrical performance characteristics. 1/ Test Symbol Test conditions Recommended operating conditions unless otherwise specified Limits Unit Min Max High level output voltage VOHPCI IOH= -0.5 mA 0.9 DVDDV IO
27、H= -2 mA 2.4 Miscellaneous 2/ IOH= -4 mA DVDD 0.6 Low level output voltage VOLPCI IOL= 1.5 mA 0.1 DVDDV IOL= 6 mA 0.55 Miscellaneous 2/ IOL= 4 mA 0.5 Three-state output high impedance IOZOutput pins VDD= 3.6 V, VO= DVDDor GND 20 A Low level input current IILInput pins VDD= 3.6 V, VI= GND 20 A I/O pi
28、ns 3/ VDD= 3.6 V, VI= GND 20 High level input current IIHPCI 3/ VDD= 3.6 V, VI= DVDD20 A Others 3/ VDD= 3.6 V, VI= DVDD20 Device Supply current (internal voltage regulator enabled, REG_EN = L) IDD4/ 158 Typ mA 5/ 128 Typ 6/ 69.8 Typ Supply current ultra low power mode (internal voltage regulator ena
29、bled, REG_EN = L) IDD(ULP)Ports disabled, VDD= 1.8 V (internal), TA = 25C 3 Typ mA Supply current ultra low power mode (internal voltage regulator disabled, REG_EN = H, REG18 = 1.8 V) IDD(ULP)Ports disabled, VDD= 1.8 V (external), TA = 25C 50 Typ A Power status threshold, CPS inputs 7/ VTH400 k resi
30、stor 7/ 4.7 7.5 V TPBIAS output voltage VOAt rated IOcurrent 1.665 2.015 V Input current (PC0-PC2 inputs) IIVDD= 3.6 V 5 A Pullup current ( RST_G input) IIRST VI= 1.5 V -90 -20 A VI= 0 V -90 -20 Driver Differential output voltage VOD56 , see figure 4 172 265 mV Driver difference current, TPA+, TPA-,
31、 TPB+, TPB- IDIFFDrivers enabled, speed signaling off -1.05 8/ 1.05 8/ mA Common-mode speed signaling current, TPB+, TPB- ISP200S200 speed signaling enabled -4.84 9/ -2.53 9/ mA Common-mode speed signaling current, TPB+, TPB- ISP400S400 speed signaling enabled -12.4 9/ -8.1 9/ mA Off state different
32、ial voltage VOFFDrivers disabled, see figure 4 20 mV See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05605 REV A PAGE 7 TABLE I. Electri
33、cal performance characteristics - Continued. Test Symbol Test conditions Recommended operating conditions unless otherwise specified Limits Unit Min Max Receiver Differential impedance ZIDDrivers disabled 4 k 4 pF Common mode impedance ZICDrivers disabled 20 k 24 pF Receiver input threshold voltage
34、VTH-RDrivers disabled -30 30 mV Cable bias detect threshold, TPBx cable inputs VTH-CBDrivers disabled 0.6 1 V Positive arbitration comparator threshold voltage VTH+Drivers disabled 89 168 MV Negative arbitration comparator threshold voltage VTH-Drivers disabled -168 -89 mV Speed signal threshold VTH
35、-SP200TPBIAS-TPA common mode voltage, drivers disabled 49 131 mV Speed signal threshold VTH-SP400TPBIAS-TPA common mode voltage, drivers disabled 314 396 mV Thermal characteristics RJA,high K board 128-PDT Board mounted, no air flow, JEDEC test board 74.6 C/W RJA, low K-board 128-PDT 101.3 C/W RJC12
36、8-PDT 18.7 C/W Switching characteristics for PHY port interface Jitter, transmit Between TPA and TPB 0.15 ns Skew, transmit Between TPA and TPB 0.1 ns TP differential rise time, transmit tr10% to 90%, at 1394 connector 0.5 1.2 ns TP differential fall time, transmit tf90% to 10%, at 1394 connector 0.
37、5 1.2 ns Operating, timing, and switching characteristics of XI VDD3.0 3.6 V(PLLVDD) High level input voltage VIH0.63 VDDTyp V Low level input voltage VIL0.33 VDDV Input clock frequency 24.576 Typ MHz Input clock frequency tolerance 100 PPM Input slew rate 0.2 4 V/ns Input clock duty cycle 40% 60% S
38、ee notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05605 REV A PAGE 8 TABLE I. Electrical performance characteristics - Continued. Test Symb
39、ol Test conditions Recommended operating conditions unless otherwise specified Limits Unit Min Max Switching characteristics for PCI interface 10/ Setup time for PCLK tsu-50% to 50% 7 ns Hold time for PCLK th-50% to 50% 0 ns Delay time, PCLK to data valid tval-50% to 50% 2 11 ns Notes: 1/ Testing an
40、d other quality control techniques are used to the extent deemed necessary to ensure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific testing,
41、 product performance is assured by characterization and/or design. 2/ Miscellaneous terminals are: GPIO2(90), GPIO3 (89), SDA (92), SCL (91). 3/ For I/o terminals, input leakage (IILand IIH) includes IOZof the disabled output. 4/ Transmit data (transmit on all ports full isochronous payload of 84 s,
42、 S400, data value of CCCC CCCCh). 5/ Repeat data (receive on one port, transmit on other two ports, full isochronous payload of 84 s, S400, data value of CCCC CCCCh). 6/ Idle (receive or transmit cycle start on the port), VDD= 3.3 V, TA= 25C. 7/ Measured at cable power side of resistor. 8/ Limits de
43、fined as algebraic sum of TPA+ and TPA- driver currents. Limits also apply to TPB+ and TPB- algebraic sum of driver currents. 9/ Limits defined as absolute limit of each of TPB+ and TPB- driver currents. 10/ These parameters are ensured by design. Provided by IHSNot for ResaleNo reproduction or netw
44、orking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05605 REV A PAGE 9 Case X Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A 1.20 .047 D/E 15.90 16.10 .626 .634 A1 0.95 1.05 .037 .
45、041 D1/E1 13.95 14.05 .549 .553 A2 0.05 .002 D2 12.40 Typ .488 Typ A3 0.25 Typ .010 e 0.40 Typ .016 Typ b 0.13 0.23 .005 .009 L 0.45 0.75 .018 .030 C 0.13 NOM .005 NOM Notes: 1. All linear dimensions are in millimeters. 2. This drawing is subject to change without notice. 3. Falls within JEDEC MO-13
46、6 FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05605 REV A PAGE 10 Terminal number Terminal name Terminal number Terminal name Terminal
47、number Terminal name Terminal number Terminal name 1 DGND 33 PCI_AD13 65 DVDD97 AGND 2 PCI_C/ 3BE 34 PCI_AD12 66 DGND 98 AVDD3 VDDP35 PCI_AD11 67 CAN 99 R1 4 PCI_IDSEL 36 DGND 68 PHY_TEST_MA 10 R0 5 PCI_AD23 37 PCI_AD10 69 CPS 101 FILTER0 6 PCI_AD22 38 PCI_AD9 70 AVDD102 FILTER1 7 DVDD39 PCI_AD8 71
48、AGND 103 PLLVDD8 PCI_AD21 40 DVDD72 AVDD104 PLLGND 9 PCI_AD20 41 PCI_C/ 0BE 73 AGND 105 X1 10 PCI_AD19 42 PCI_AD7 74 TPB0- 106 X0 11 PCI_AD18 43 DGND 75 TPB0+ 107 EN_REG 12 DGND 44 PCI_AD6 76 AGND 108 CLKRUN_PCI 13 PCI_AD17 45 PCI_AD5 77 TPA0- 109 INTA_PCI 14 PCI_AD16 46 VDDP78 TPA0+ 110 RST_G 15 PCI_C/ 2BE
