1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Technical changes in 1.4 and table I. Add figure 3. Change 2/ of table I and add 3/ to table I. Add test condition B to burn-in and steady-state life test conditions. Editorial changes throughout 89-02-07 W. Heckman B Made technical changes in 1.
2、4 and table I. Added vendor CAGE 27014. Editorial changes throughout. 91-07-11 W. Heckman C Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 01-05-21 Raymond Monnin D Update drawing to current requirements. Editorial changes throughout. - gap 08-08-14 R
3、obert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tim H. Noh COLUMBUS, OHIO
4、43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, BIPOLAR, EDGE TRIGGERED, D-TYPE FLIP-FLOP, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-04-18 MONOLITHIC SILICON AMSC N/A REVISION LEVEL
5、D SIZE A CAGE CODE 67268 5962-88550 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E193-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88550 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEV
6、EL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
7、5962-88550 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F273 Octal edge triggered, D-type flip-flop with asynchronous mas
8、ter reset 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lea
9、d finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc to +7.0 V dc Input voltage range (VIN) . -0.5 V dc to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) 1/ 484 mW Lead temperature (
10、soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.
11、8 V dc Case operating temperature range (TC) -55C to +125C Minimum setup time (ts): high or low, DATA to CP 4.0 ns Minimum hold time (th): high or low, DATA to CP 1.0 ns Minimum clock pulse width: low, CP (tPW1) . 6.0 ns high or low, MR(tPW2) . 6.0 ns Minimum recovery time (tREC): MR to CP 9.0 ns _
12、1/ Must withstand the added PDdue to short circuit test, e.g., IOS.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88550 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC
13、FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicita
14、tion or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF D
15、EFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelp
16、hia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obt
17、ained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and quali
18、fied manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Qualit
19、y Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to ide
20、ntify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal
21、connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteri
22、stics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electr
23、ical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88550 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 AP
24、R 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the ma
25、nufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certificatio
26、n mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance
27、 submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A sh
28、all be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review t
29、he manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening.
30、 Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, or D. The test circuit shall be maint
31、ained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of
32、 MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking pe
33、rmitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88550 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C Group A subgroups Limits
34、Unit unless otherwise specified Min Max High level output voltage VOHVCC= 4.5 V, VIL= 0.8 V, VIH= 2.0 V, IOH= -1.0 mA 1, 2, 3 2.5 V Low level output voltage VOLVCC= 4.5 V, VIL= 0.8 V, VIH= 2.0 V, IOL= 20 mA 1, 2, 3 0.5 V Input clamp voltage VICVCC= 4.5 V, IN= -18 mA 1, 2, 3 -1.2 V Low level input cu
35、rrent IILVCC= 5.5 V, VIN= 0.5 V, Inputs not under test 4.5 V 1, 2, 3 -0.6 mA High level input current IIHVCC= 5.5 V, VIN= 2.7 V, Inputs not under test 4.5 V 1, 2, 3 20 A Short circuit output current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 -60 -150 mA Power supply current ICCHVCC= 5.5 V, VIN= 4.5 V 1,
36、2, 3 85 mA ICCLVCC= 5.5 V, VIN= 0.0 V 1, 2, 3 88 mA Functional tests See 4.3.1c 7, 8 Propagation delay time, CP to Qn tPLH19, 10, 11 2.5 11.5 ns tPHL1 3.0 12.0 ns Propagation delay time, MR to Qn tPHL2VCC= 5.5 V, CL= 50 pF RL= 500 2/ See figure 3 3.0 12.0 ns Maximum clock frequency 3/ fMAX9 100 MHz1
37、/ Not more than one output should be shorted at a time, and the duration of the short circuit condition should not exceed one second. 2/ Propagation delay limits are based on single output switching. Unused outputs = 3.5 V or 0.3 V. 3/ fMAX, is guaranteed, but not tested, at VCC= 5.5 V, TC= -55C and
38、 TC= +125C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88550 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 Device types 01 Case outlines R, S, an
39、d 2 Terminal number Terminal Symbol 1 MR 2 Q0 3 D0 4 D1 Connection Description 5 Q1 6 Q2 Q0 - Q7 Data outputs 7 D28 D3 D0 - D7 Data inputs 9 Q310 GND Clock pulse input 11 CP CP (Active rising edge) 12 Q4 13 D4 MR Master reset (active low) 14 D5 15 Q5 16 Q617 D6 18 D719 Q7 20 VCCFIGURE 1. Terminal co
40、nnections. Inputs Outputs Operating mode MR CP Dn Qn Reset (clear) L X X L Load (1) H h H Load (0) H l L H = High voltage level steady state. h = High voltage level one setup time prior to the low-to-high clock transition. L = Low voltage level steady state. l = Low voltage level one setup time prio
41、r to the low-to-high clock transition. X = Irrelevant. = Low-to-high clock transition. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88550 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHI
42、O 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88550 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO
43、43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. Input pulse characteristics: PRR = 1MHz, tTLH= tTHL= 2.5 ns, duty cycle = 50%. 3. RT ZOUTof pulse generators. 4. The shaded areas indicate when the input is permitted to change for predictabl
44、e output performance. FIGURE 3. Test circuit and switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88550 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL
45、D SHEET 9 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A te
46、st requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C,
47、 and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2
48、Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005
