1、SMD-5962-92268 REV A 9999996 0090194 577 DEFENSE LOGISTICS AGENCY DEFENSE SUPPLY CENTER, COLUMBUS POST OFFICE BOX 3990 COLUMBUS, OH 43216-5000 IN REPLY REFER TO DSCC-VAC (h4r. T. Nguyen/(DSN)850-067 1/6 14-692-0671tvn) NOV 13 SUBJECT: Notice of Revision (NOR) 5962-RO30-97 for Standard Microcircuit D
2、rawing (SMD) 5962-92268 Military/Industry Distribution The enclosed NOR is approved for use effective as of the date of the NOR. In accordance with MIL-STD- 1 O0 SMD holders should, as a minimum, handwrite those changes described in the NOR to sheet 1 of the subject SMD. After completion, the NOR sh
3、ould be attached to the subject SMD for future reference. Those companies who were listed as approved sources of supply prior to this action have agreed to actions taken on devices for which they had previously provided DSCC a certificate of compliance. This is evidenced by an existing active curren
4、t certificate of compliance on file at DSCC with a DSCC record of verbal coordination. The certificate of compliance for these devices is considered concurrence with the new revision unless DSCC is otherwise notified. If you have comments or questions, please contact Thanh Nguyen at (DSN)SSO-O671/(6
5、14)692-0671. 1 Encl MONICA L. POELKING Chief, Custom Microelectronics Team Federal Recycling Program Printed on Recycled Paper Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SWD-5762-92268 REV A 9999996 0090195 4Olm i. DATE (WMMDD) Fofm Approved 96-
6、10-17 OMB NO. 07060188 NOTICE OF REVISION (NOR) THIS REVISION DESCRIBED BELOW HAS BEEN AUTHORIZED FOR THE DOCUMENT LISTED. SSUING CONTRACTING OFFICER FOR THE CONTRACT/ PROCURING ACTIVITY NUMBER LISTED IN ITEM 2 OF THIS FORM. b. ADDRESS (Street, City, State, Zip code) 5. CAGE CODE 6. NOR NO. t. ORIGI
7、NATOR Defense Supply Center, Columbus 67268 5962-RO30-97 P. TYPED NAME (First, Middle Initial, Last) 3990 E. Broad Street Columbus, OH 43216-5000 7. CAGE CODE 67268 8. DOCUMENT NO. 5962-92268 Sheet 1: Sheet 6: 3. TITLE OF DOCUMENT MICROCIRCUIT, DIGITAL, FAST CMOS, 20-BIT NONINVERTING TRANSPARENT LAT
8、CH WITH THREE-STATE OUTPUTS, lTL COMPATIBLE INPUTS AND LIMITED OUTPUT VOLTAGE SWING, MONOLITHIC SILICON Initial A 10. REVISION LETTER a. CURRENT b. NEW Revisions Itr column; add “A“. Revisions description column; add “Changes in accordance with NOR 5962-R030-97“. Revisions date column; add “96-10-1
9、7“. Revision level block; add “A. Rev status of sheets: for sheets 1 and 6, add “A. Table I, output short circuit current, los; change maximum limit from “-225 mA“ to “-250 mA“. Revision level block: add “A“. 11. ECP NO. N/A 14. THIS SECTION FOR GOVERNMENT USE ONLY “ X (1) Existing document suppleme
10、nted by the NOR may be used in manufacture. (2) Revised document must be received before manufacturer may incorporate this change. (3) Custodian of master document shall make above revision and furnish revised document. il. TITLE Chief, Custom Microelectronics Team b. ACTIVITY AUTHORIZED TO APPROVE
11、CHANGE FOR GOVERNMENT DSCC-VAC e. SIGNATURE I Monica L. Poelking c. TYPED NAME (First, Middle Initial, Last) Monica L. Poelking f. DATE SIGNED (YYMMDD) I 96-1 0-1 7 b. REVISION COMPLETED (Signature) I Thanh V. Nguyen 15a. ACTIVITY ACCOMPLISHING REVISION DSCC-VAC c. DATE SIGNED (YYMMDD) I 96-1 0-1 7
12、)D Form 1695, APR 92 Previous editions are obsolete. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-LTR = SHEET DESCRIPTION DATE (YR-HO-DA) APPROVED REV STATUS OF SHEETS SIZE A PMIC NIA CAGE CODE 5962-92268 67268 - STANDARD MICROCIRCUIT DRAWING THIS
13、 DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AHSC N/A ESC FORH 193 JUL 91 DEFENSE ELECTRONICS SUPPLY CENTER PREPARED BY Joseph A. Kerby DAYTON, OHIO 45444 CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 94-10-05 REVISION L
14、EVEL 5962-E359-94 DISTRIBUTION STATERENT A. Approved for public release; distribution is unlimited. - Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I. SCOPE STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 1.1 Ccqp
15、e. This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and MI and space application (device class V), and a choice of case outlines and lead finishes are available and
16、 are reflected in the Part or Identifying Nunber (PIN). 1.2.1 of MIL-STD-883, rtProvisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices“. available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. Device class M microcircuits represent non-
17、JAN class B microcircuits in accordance with When SIZE A 5962-92268 REVISION LEVEL SHEET 2 1.2 m. The PIN shall be as shown in the following example: 1.2.1 RHA designator. Device class M RHA marked devices shall meet the MIL-1-38535 appendix A specified RHA levels and shall be marked with the approp
18、riate RHA designator. MIL-1-38535 specified RHA levels and shall be marked with the appropriate RHA designator. non-RHA device. Device classes Q and V RHA marked devices shall meet the A dash (-) indicates a 1.2.2 Device typeCs). The device type(s) shall identify the circuit function as foClows: Dev
19、i ce type Generic number Circuit function o1 54FCT16841 AT 20-bit noninverting transparent latch with three-state outputs, TTL compatible inputs and limited output voltage swing 02 54FCT16841BT 20-bit noninverting transparent latch with three-state outputs, TTL compatible inputs and limited output v
20、oltage swing 03 54FCT16841CT 20-bit noninverting transparent latch with three-state outputs, TTL compatible inputs and limited output voltage swing 1.2.3 Device class designator. The device class designator shall be a single Letter identifying the product assurance level as follows: Device class Dev
21、ice requirements documentation M Vendor self-certification to the requirements for non-JAN class E microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or v Certification and qualification to HIL-1-38535 1.2.4 Case outline(s). The case outline(s1 shall be as designated in MIL-STD-1835, and as fol
22、lows: Outline letter Descriptive designator Terminals Packaae style X GDFPI-F56 56 Flat pack 1.2.5 Lead finish. The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-1-38535 for classes Q and V. designation is for use in specifications when lead finishes A, 6, and
23、C are considered acceptable and interchangeable without preference. Finish letter “X“ shall not be marked on the microcircuit or its packaging. The “X“ DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1.3 Absolute maximm ratings.
24、 I/ 2/ 3/ Supply voltage range (V ) - - - - - - - - - - - - - - - - - - DC input voltage range RI,) - - - - - - - - - - - - - - - - - DC output voltage range (V ) - - - - - - - - - - - - - - - - DC input clamp current (I = -0.5 V ) - - - - - - - - - DC output clamp current (I,) (VOUT -0.5 V and +7.0
25、 V) - - - - DC output source current (I - - - - - - - - - DC output sink current (IOL?“(per output) - - - - - - - - - - Groun8 current (sGND) - - - - - - - - - - - - - - - - - - - - Storage temperature range (TSf) - - - - - - - - - - - - - - - Case temperature under bias ) -_-_- Lead temperature (so
26、ldering, I!%conds) - - - - - - - - - - - Thermal resistance, junction-to-case (OJc) - - - - - - - - - - Junction temperature (TJ) - - - - - - - - - - - - - - - - - - Maxiarum power dissipation (PD) - - - - - - - - - - - - - - - - ) (per output) DC Vc current (Icc) - - - - - - - - - - - - - - - - - -
27、 - - 1.4 Recommended operatinq conditions. 2/ ?/ Supply voltage range (Vcc) - - - - - - - - - - - - - - - - - - Input voltage range (VIN) - - - - - - - - - - - - - - - - - - Output voltage range (Vou.$ - - - - - - - - - - - - - - - - - Maximum low level input voltage (V - - - - - - - - - - - - Minim
28、um high level input voltage (6; ) - - - - - - - - - - - - Case operating temperature range (T 7 - - - - - - - - - - - - Maximum input rise or fall rate (AdAV): - - - - - - - - Haximum high level output current (Io 1 - - - - - - - - - - - Maximum low level output current (Io$ - - - - - - - - - - - -
29、1 (from VIN = 0.3 V to 2.7 V, 2.7 V to 0.3 V) STANDARD MI C ROC I RCUI T DRAM NG DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 1.5 Disital logic testincl for device classes Q and V. SIZE A 5962-92268 REVISION LEVEL SHEET 3 Fault coverage measurement of manufacturing Logic tests (MIL-STD-883,
30、test method 5012) - - - - - - - - -0.5 V dc to +7.0 V dc -0.5 V dc to Vcc + 0.5 V dc -0.5 V dc to Vcc -20 mA I20 mA -30 mA +70 IiA I480 RI/ +I120 niA -65C to +15OoC -65C to +135C +3m0 c See MIL-STD-1835 +175OC 1.0 w and the absolute value of the magnitude, not the sign, is relative to the minimum an
31、d maximum limits, as applicable, listed herein. limits specified in table I at 4.5 V +- Vcc 5 5.5 V. This parameter is guaranteed, if not tested, to the limits specified in table I herein. Three-state output conditions are required. This test niay be performed using VIH = 3.0 V. Not more than one ou
32、tput should be tested at a time. For IoFF testing, test each input and output. ICCD may be verified by the following equation: Output terminals not designated shall be high level logic, low level logic, or open, and AIcc tests, the output terminals shall be open. All devices shall meet or exceed the
33、 When VIH = 3.0 V is used, the test is guaranteed for VIH = 2.0 V. The duration of the test should not exceed one second. ICCT - Icc - DNAI ICCD = fCp/2 + fiNi where ICCT, Icc (Icc or IcCH in table I), and AI, shall be the measured values of these parameters, for the device under test, wken tested a
34、s described in tabfe 1, herein. The values for DH, NT, fCp, fi, and Ni shall be as listed in the test conditions column for ICCT in table I, herein. - 101 This test may be performed either one input at a tine preferred method) or with all input pins simultaneously at VIM = Vcc - 2.1 V (alternate met
35、hod). using the alternate test method, the maximum limit is equal to the number of inputs at a high TTL input level times 1.5 mA; and the preferred method and limits are guaranteed. Classes Q and V shall use the preferred method. Uhen the test is performed ESC FORM 193A JUL 91 Provided by IHSNot for
36、 ResaleNo reproduction or networking permitted without license from IHS-,-,-TABLE I. Electrical performance characteristics - Continued. - Il/ ICCT is calculated as follows: ICCT = Icc t DNAI, t ICCD(fCp/2 t fiNi) where - Quiescent supply current (any IccL or ICCH) $,=-Duty cycle for TTL inputs at 3
37、.4 V NT = Num see 4.4.1 herein. - 131 This test is for qualification only. Ground and V bounce tests are performed on a non-switching (quiescent) output and are used to masure the magnitude of in%ced noise caused by other simultaneously switching outputs. The test is performed on a low noise bench t
38、est fixture. with 5oMl of load resistance and a minimum of 50 pF of load capacitance (see figure 4). resistors shall be used. it is suggested, that whenever possible, this distance be kept to less than 0.25 inches. shall be placed in parallel from Vcc to ground. the device manufacturer. a 1 GHz mini
39、mum bandwidth oscilloscope with a 5M1 input impedance. For the device under test, all outputs shall be loaded Only chip capacitors and The output load components shall be located as close as possible to the device outputs. DecoupLing capacitors The values of these decoupling capacitors shall be dete
40、rmined by The low and high level ground and Vcc bounce noise is measured at the quiet output using The device inputs shall be conditioned such that all outputs are at a high nominal VOH level. The device inputs shall then be conditioned such that they switch simultaneously and the output under test
41、remains at V other outputs possible are switched from VOH to VOL. VOH and VOHP are then measured from the nomina?HVOH level to the largest negative and positive peaks, respectively ?see figure 4). outputs not under test switching from VOL to VOH. as all This is then repeated with the same The device
42、 inputs shall be conditioned such that all outputs are at a low nominal VOL level. shall then be conditioned such that they switch simultaneously and the output under test remains at V other outputs possible are switched from VOL to VOH. VoLp and VoLv are then measured from the nomina? VOL level to
43、the largest positive and negative peaks, respectively (see figure 4). outputs not under test switching from VOH to VOL. The device inputs as all This is then repeated with the same - 14/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and Al
44、l possible input to output logic patterns per function other logic patterns used for fault detection. minimum, test all functions of each input and output. shall be guaranteed, if not tested, to the truth table in figure 2 herein. Sequence as approved by the qualifying activity on qualified devices.
45、 The test vectors used to verify the truth table shall, at a Functional tests shall be performed in For outputs, L 1.5 V, H 2: 1.5 V. - 151 AC limits at Vcc = 5.5 V are equal to the limits at Vcc = 4.5 V and guaranteed by testing at V For propagation dekay tests, all paths must be tested. = 4.5 V. M
46、inimum propagation delay time limits for Vc = 4.5 V and 5.5 V are guaranteed, if not tested, to the ffmits specified in table I, herein. - 161 This parameter is guaranteed, if not tested, to the limits specified in table I herein. The limits at Vcc = 5.5 V t, (o) is the absolute value of the differe
47、nce between the are guaranteed and equal to the limits at Vcc = 4.5 V. actual propagation delay for any two separate outputs of the same package switching in the same direction (low-to-high, high-to-low). STANDARD 5962-92268 MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 I
48、 I I DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-_- - - - _ _I - - - SMD-5962-72268 7999996 0064686 97T M Terminal symbol mDn (RI = 1 to 2, n = 1 to IO) mLE (m = 1 to 2) Device types Description Data inputs Latch enable inDu
49、tc (active hiah) Case outline ME (ni = I to 2) mQn (m = 1 to 2, n = 1 to IO) Termina 1 number Output enable control inputs (active low) Three-state outputs 1 2 3 4 5 6 7 8 9 10 11 12 13 14 STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 01, 02, 03 SIZE A 5962-92268 REVISION LEVEL SHEET 11 Terminal symbo 1 10E I QI la2 GND 1 Q3 1Q4 - vcc 1Q5 lQ6 1 47 GND 1Q8 1Q9 1Q10 Termi na 1 numbe
