1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R076-97. - JAK 96-11-25 Monica L. Poelking B Incorporate NOR and update boilerplate to latest MIL-PRF-38535 requirements. CFS 01-06-11 Thomas M. Hess C Add device types 02 and 03. Add test circuit and make chan
2、ges to voltage levels for the waveforms in figure 4. Editorial changes throughout. TVN 04-05-27 Thomas M. Hess D Add ASTM guideline in 2.2. Correct voltage level testing in switching waveforms and test circuit, figure 4. Updated RHA testing paragraphs in 4.4.4.1 - 4.4.4.4. Add appendix A. - JAK 07-0
3、8-29 Thomas M. Hess E Correct radiation features for device type 02 in section 1.5 and add footnote 8/. Correct footnotes 2/ and 8/ in Table IA. Correct SEP test limit in the table IB. Update boilerplate paragraphs to current MIL-PRF-38535 requirements.- MAA 09-10-05 Thomas M. Hess F Make correction
4、s to table IA, output voltage tests VOHand VOL, change condition VIN- jak 11-01-26 Thomas M. Hess G Change radiation level H to G for device type 01. Update radiation features in section 1.5 and footnote 2/ in table IA. - MAA 11-04-18 David J. Corbett H Add equivalent test circuits and footnote 6 to
5、 figure 4. Delete class M requirements. - MAA 12-10-25 Thomas M. Hess J Add footnote 4/ for capacitance limit for measurements of propagation delay time to table IA. MAA 13-08-20 David J. Corbett REV SHEET REV J J J J J J J SHEET 15 16 17 18 19 20 21 REV STATUS OF SHEETS REV J J J J J J J J J J J J
6、J J SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHEC
7、KED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, QUADRUPLE 2-INPUT AND GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-06-11 REVISION LEVEL J SIZE A CAGE CODE 67268 5962-96519 SHEET 1 OF 21 DSCC FORM 2233 APR 97
8、5962-E523-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96519 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two
9、 product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA)
10、levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example 5962 G 96519 01 V X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1
11、RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic numb
12、er Circuit function 01 54ACTS08 Radiation hardened, quadruple 2-input AND gate, TTL compatible inputs 02 54ACTS08E Enhanced, radiation hardened, quadruple 2-input AND gate, TTL compatible inputs 03 54ACTS08E Enhanced, radiation hardened, quadruple 2-input AND gate, TTL compatible inputs 1.2.3 Device
13、 class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as
14、 follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitt
15、ed without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96519 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V
16、dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC)
17、: Case outline C and X (device type 01). See MIL-STD-1835 Case outline X (device types 02 and 03) . 15C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 . 1.0 W Device types 02 and 03 . 3.2 W 4/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range
18、(VDD): Device type 01 . +4.5 V dc to +5.5 V dc Device types 02 and 03 . +3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (TC) . -55C to +125C Maximum input rise or fall time rate at VDD= 4.5 V (tr, tf) . 1
19、ns/V 5/ 1.5 Radiation features. 6/ Maximum total dose available: Device type 01 (dose rate = 50 300 rad (Si)/s) 500 Krad (Si) 7/ Device type 02 (effective dose rate = 1rad (Si)/s) 1 Mrad (Si) 8/ Device type 03 (dose rate = 50 300 rad (Si)/s) 500 Krad (Si) 7/ Single event phenomenon (SEP): Device typ
20、e 01: No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV/(mg/cm2) 9/ No SEL occurs at effective LET (see 4.4.4.4) . 120 MeV/(mg/cm2) 9/ Device types 02 and 03: No SEU occurs at effective LET (see 4.4.4.4) . 108 MeV/(mg/cm2) 9/ No SEL occurs at effective LET (see 4.4.4.4) 120 MeV/(mg/cm2) 9/ Dose
21、rate induced upset (20 ns pulse) (device types 01, 02 and 03) 1 x 109Rad(Si)/s 9/ 10/ Dose rate induced latch-up . None 9/ Dose rate survivability (device types 01, 02 and 03) . 1 x 1012Rad (Si)/s 9/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended ope
22、ration at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise
23、specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ(max) - TC(max) . JC5/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 6/ Radiation testing is performed on the standard evaluation circuit. 7/ Device types 01 and 03 are teste
24、d in accordance with MIL-STD-883, method 1019, condition A. 8/ Device type 02 is irradiated at dose rate = 50 - 300 rad (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature anneal
25、 = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, or lower, environment. 9/ Limits are guaranteed by design or process, but not production tested unless specified by the customer
26、through the purchase order or contract. 10/ This limit is applicable for device types 01, 02, 03 with VDD 4.5 V. Device types 02 and 03 do not meet this limit at VDD 4.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING
27、 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96519 REVISION LEVEL J SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified
28、herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Mic
29、rocircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or fro
30、m the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited
31、in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at http:/www.astm.org or from ASTM International, 100
32、Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD20 Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS devices. JESD78 IC Latch-Up Test. (Copies of these documents are available online at http:/w
33、ww.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201-2107.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in th
34、is document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-
35、96519 REVISION LEVEL J SHEET 5 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modif
36、ication in the QM plan shall not affect the form, fit, or function as described herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as
37、specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figur
38、e 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufac
39、turer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradia
40、tion parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are described in table IA. 3.5 M
41、arking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For R
42、HA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certi
43、ficate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an a
44、pproved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provide
45、d with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96519 REVISION LEVEL J SHEET 6 DSCC FORM 2234 APR 97
46、 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ 2/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 3/ Unit Min Max High level input voltage VIH02, 03 3.0 V 1, 2, 3 2.0 V All 4.5 V 1, 2, 3 2.25 All 5.5 V 1, 2, 3 2.75 Low level input v
47、oltage VIL02, 03 3.0 V 1, 2, 3 0.8 V All 4.5 V 1, 2, 3 0.8 All 5.5 V 1, 2, 3 0.8 High level output voltage VOHFor all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOH= -6 mA 02, 03 3.0 V 1, 2, 3 2.4 V For all inputs affecting output under test, VIN= VDDor VSSF
48、or all other inputs VIN= VDDor VSSIOH= -8 mA All 4.5 V 1, 2, 3 3.15 Low level output voltage VOLFor all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOL= +6 mA 02, 03 3.0 V 1, 2, 3 0.4 V For all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOL= +8 mA All 4.5 V 1, 2, 3 0.4 Input current high IIHFor input under test, VIN= VDDFor all other inputs, VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A Input current low IILFor input under test, VIN= VSSFor all other inputs, VIN= VDDor VS
