1、Lessons Learned Entry: 1618Lesson Info:a71 Lesson Number: 1618a71 Lesson Date: 2005-07-29a71 Submitting Organization: JPLa71 Authored by: Barrie GauthierSubject: Design Circuits to Facilitate Pre-I test-induced failure, Manufacturing/ Engineering Lesson(s) Learned: 1. Disassembly of a highly integra
2、ted spacecraft like MER during ATLO for replacement of a fuse, or of a defective assembly, may not be a trivial action. Spacecraft circuitry needs to be designed for testability, as well as for post- launch performance. 2. Evaluating the appropriate placement of test points can greatly enhance the t
3、estability of flight hardware, and it can assure system safety by aiding in the inspection of test readiness. Recommendation(s): 1. Ensure that the production process for electronic modules includes a provision for inspecting (i.e., “buzzing out”) each circuit after the build. 2. Design-in enough te
4、st points to get proper access to circuits for post-build and pre-I&T (pre-ATLO) inspection. Evidence of Recurrence Control Effectiveness: Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-JPL has opened Preventive Action Notice (PAN) No. Z87070 on Jul
5、y 25, 2005 to initiate and document appropriate Laboratory-wide action on the above recommendations.” Documents Related to Lesson: “Design, Verification/Validation & Ops Principles for Flight Systems (Design Principles),” (JPL Document D-17868), Rev. 2, JPL DocID 43913, March 3, 2003, Para. 4.11.5.1
6、 (Testability).Mission Directorate(s): a71 Exploration Systemsa71 Sciencea71 Aeronautics Researcha71 Space OperationsAdditional Key Phrase(s): a71 Flight Equipmenta71 Hardwarea71 Payloadsa71 Spacecrafta71 Test & Verificationa71 Test ArticleAdditional Info: Approval Info: a71 Approval Date: 2006-04-12a71 Approval Name: dkruhma71 Approval Organization: HQProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
