1、 IEC 60424-2 Edition 2.0 2015-12 INTERNATIONAL STANDARD NORME INTERNATIONALE Ferrite cores Guidelines on the limits of surface irregularities Part 2: RM-cores Noyaux ferrites Lignes directrices relatives aux limites des irrgularits de surface Partie 2: Noyaux RM IEC 60424-2:2015-12(en-fr) THIS PUBLI
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19、rez nous donner des commentaires sur cette publication ou si vous avez des questions contactez-nous: csciec.ch. IEC 60424-2 Edition 2.0 2012 INTERNATIONAL STANDARD NORME INTERNATIONALE Ferrite cores Guidelines on the limits of surface irregularities Part 2: RM-cores Noyaux ferrites Lignes directrice
20、s relatives aux limites des irrgularits de surface Partie 2: Noyaux RM INTERNATIONAL ELECTROTECHNICAL COMMISSION COMMISSION ELECTROTECHNIQUE INTERNATIONALE ICS 29.100.10 ISBN 978-2-8322-3031-2 Registered trademark of the International Electrotechnical Commission Marque dpose de la Commission Electro
21、technique Internationale Warning! Make sure that you obtained this publication from an authorized distributor. Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agr. 2 IEC 60424-2:2015 IEC 2015 CONTENTS FOREWORD . 3 1 Scope 5 2 Normative references . 5 3 Lim
22、its of surface irregularities 5 3.1 Visual inspection and recommended limits . 5 3.2 Chips and ragged edges 6 3.2.1 Chips and ragged edges on mating surfaces 6 3.2.2 Chips and ragged edges on other surfaces . 6 3.3 Cracks 9 3.4 Flash. 10 3.5 Pull-outs . 10 3.6 Crystallites 11 3.7 Pores 12 Bibliograp
23、hy 13 Figure 1 Chips and ragged edges on mating surfaces . 6 Figure 2 Cracks location Top view . 9 Figure 3 Cracks location Bottom view 9 Figure 4 Dimension W 10 Figure 5 Flash and pull-out location 11 Figure 6 Pull-out in clamping recess area . 11 Figure 7 Crystallites location for RM-core . 11 Fig
24、ure 8 Pores location for RM-core . 12 Table 1 Relevant subclauses for given irregularity versus location 5 Table 2 Allowable chipping areas 6 Table 3 Area and length references for visual inspection . 8 Table 4 Limits for cracks 10 Table 5 W dimensions 10 IEC 60424-2:2015 IEC 2015 3 INTERNATIONAL EL
25、ECTROTECHNICAL COMMISSION _ FERRITE CORES GUIDELINES ON THE LIMITS OF SURFACE IRREGULARITIES Part 2: RM-cores FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees).
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36、ndard IEC 60424-2 has been prepared by technical committee 51: Magnetic components and ferrite materials. This second edition cancels and replaces the first edition published in 1997. This edition constitutes a technical revision. This edition includes the following significant technical changes wit
37、h respect to the previous edition: a) addition of crystallites in 3.6 and of pores in 3.7. 4 IEC 60424-2:2015 IEC 2015 The text of this standard is based on the following documents: FDIS Report on voting 51/1108/FDIS 51/1122/RVD Full information on the voting for the approval of this standard can be
38、 found in the report on voting indicated in the above table. This publication has been drafted in accordance with the ISO/IEC Directives, Part 2. A list of all parts in the IEC 60424 series, published under the general title Ferrite cores Guidelines on the limits of surface irregularities, can be fo
39、und on the IEC website. Future standards in this series will carry the new general title as cited above. Titles of existing standards in this series will be updated at the time of the next edition. The committee has decided that the contents of this publication will remain unchanged until the stabil
40、ity date indicated on the IEC website under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconfirmed, withdrawn, replaced by a revised edition, or amended. IEC 60424-2:2015 IEC 2015 5 FERRITE CORES GUIDELINES ON THE LIMITS OF SURFACE
41、IRREGULARITIES Part 2: RM-cores 1 Scope This part of IEC 60424 provides guidelines on the allowable limits of surface irregularities applicable to RM-cores in accordance with the relevant generic specification. This standard should be considered as a sectional specification useful in the negotiation
42、s between ferrite core manufacturers and customers about surface irregularities. Normative reference 2 Normative references The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cite
43、d applies. For undated references, the latest edition of the referenced document (including any amendments) applies. 3 Limits of surface irregularities 3.1 Visual inspection and recommended limits To facilitate quick identification of recommended limits for a given irregularity based on its location
44、, the following subclauses are summarized in Table 1. Table 1 Relevant subclauses for given irregularity versus location Location Type of irregularity For limits, see Mating surfaces Chips Ragged edges Cracks 3.2.1 3.2.1 3.3 Centre-post Chips Ragged edges Cracks 3.2.2 3.2.2 3.3 Outer walls Chips Cra
45、cks 3.2.2 3.3 Back wall Chips Ragged edges Cracks Pull-outs 3.2.2 3.2.2 3.3 3.5 Wire slot areas Chips Ragged edges Flash 3.2.2 3.2.2 3.4 Wire way areas Chips Ragged edges Flash 3.2.2 3.2.2 3.4 Clamping recess areas Chips Ragged edges Pull-outs 3.2.2 3.2.2 3.5 6 IEC 60424-2:2015 IEC 2015 3.2 Chips an
46、d ragged edges 3.2.1 Chips and ragged edges on mating surfaces The areas of the chips located on the mating surfaces (C1, C1 and C1 irregularities in Figure 1) shall not exceed the following limits: the cumulative area of the chips shall be less than 4 % of the total mating surface; the total length
47、 of the ragged edges shall be less than 25 % of the perimeter of the relevant surface. Key C1, C1, C1: chip R1, R1: ragged edge L 1 , L 2 : length of ragged edge Figure 1 Chips and ragged edges on mating surfaces Allowable chipping areas for a given core are summarized in Table 2 Table 2 Allowable c
48、hipping areas Core size Mating surfaces (mm 2 ) Other surfaces (mm 2 ) RM4/RM5 2 4 RM6/RM7 3 6 RM8 4,5 9 RM10 7 15 RM12 12,5 25 RM14 15 30 NOTE These limits are applicable to cores with and without a hole in the centre-post. 3.2.2 Chips and ragged edges on other surfaces The areas of the chips locat
49、ed on the other surfaces shall not exceed the following limits: The allowable chipping areas are doubled as compared to the limits for the mating surface (see Table 2). The rule for the ragged edges is the same as for the mating surface. Chips and ragged edges are not acceptable on the ridge of the clamping recess area. IEC Inner edge of wire slot area C1 R1 L 1L 2R1 C1 C1
