DLA SMD-5962-77059 REV F-2011 MICROCIRCUIT DIGITAL CMOS DUAL 4-INPUT AND GATE MONOLITHIC SILICON.pdf

上传人:deputyduring120 文档编号:698605 上传时间:2019-01-02 格式:PDF 页数:14 大小:128.12KB
下载 相关 举报
DLA SMD-5962-77059 REV F-2011 MICROCIRCUIT DIGITAL CMOS DUAL 4-INPUT AND GATE MONOLITHIC SILICON.pdf_第1页
第1页 / 共14页
DLA SMD-5962-77059 REV F-2011 MICROCIRCUIT DIGITAL CMOS DUAL 4-INPUT AND GATE MONOLITHIC SILICON.pdf_第2页
第2页 / 共14页
DLA SMD-5962-77059 REV F-2011 MICROCIRCUIT DIGITAL CMOS DUAL 4-INPUT AND GATE MONOLITHIC SILICON.pdf_第3页
第3页 / 共14页
DLA SMD-5962-77059 REV F-2011 MICROCIRCUIT DIGITAL CMOS DUAL 4-INPUT AND GATE MONOLITHIC SILICON.pdf_第4页
第4页 / 共14页
DLA SMD-5962-77059 REV F-2011 MICROCIRCUIT DIGITAL CMOS DUAL 4-INPUT AND GATE MONOLITHIC SILICON.pdf_第5页
第5页 / 共14页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Convert to SMD format. Technical changes in table II. Editorial changes throughout. Redrawn. 92-11-18 Monica L. Poelking C Add device type 02. Add cage 34371 as source of supply. Technical changes in 1.3 and 1.4 and table I. Boilerplate update. E

2、ditorial changes throughout. 93-11-18 Monica L. Poelking D Update boilerplate to MIL-PRF-38535 requirements. - jak 01-05-17 Thomas M. Hess E Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. - LTG 05-01-13 Thomas M. Hess F Update the boilerplate to the current MIL-PRF-3

3、8535 requirements. - jak 11-09-19 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV STATUS REV F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY William E. Shoup DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/

4、 STANDARD MICROCIRCUIT DRAWING CHECKED BY C. R. Jackson THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Nelson A. Hauck MICROCIRCUIT, DIGITAL, CMOS, DUAL 4-INPUT AND GATE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 77-12-20 AMSC N/A REVISION L

5、EVEL F SIZE A CAGE CODE 14933 77059 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E511-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 77059 REVISION LEVEL F SHEET 2 D

6、SCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 77059 01 C A D

7、rawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 4082B Dual 4-input AND gate 02 4082B Dual 4-input AND gate 1.2.2 Case outlines. The

8、 case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute

9、maximum ratings. Supply voltage range (VDD) device type 01 -0.5 V dc to +18.0 V dc 1/ Supply voltage range (VDD) device type 02 -0.5 V dc to +20.0 V dc 1/ Input voltage range -0.5 V dc to VDD+ 0.5 V dc DC input current (any one input) 10 mA Storage temperature range (TSTG) . -65C to +150C Maximum po

10、wer dissipation (PD) device type 01 200 mW 2/ Maximum power dissipation (PD) device type 02 500 mW 2/ Lead temperature (soldering, 10 seconds) +265C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage ran

11、ge (VDD) device type 01 +3.0 V dc to +15.0 V dc Supply voltage range (VDD) device type 02 +3.0 V dc to +18.0 V dc Minimum high level input voltage (VIH) . +3.5 V dc at VDD= 5.0 V dc Maximum low level input voltage (VIL):. +1.5 V dc at VDD= 5.0 V dc Case operating temperature range (TC) -55C to +125C

12、 1/ Voltages referenced to the VSSterminal. 2/ For TA= +100C to +125C, derate linearly at 12 mW/C to 200 mW. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 77059 RE

13、VISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are

14、 those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Ca

15、se Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins A

16、venue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a sp

17、ecific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer List

18、ing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flo

19、w as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL

20、-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with

21、1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switch

22、ing waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 77059 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 9

23、7 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subg

24、roups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL

25、-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535

26、to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 and QML-38535 (see 6.6 herein). The certificate of compliance submitted to DLA Land and

27、 Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be pr

28、ovided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. Land and Maritime, Land and Maritime s agent, and the acquirin

29、g activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI

30、CROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 77059 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 Table I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max High-

31、level output voltage VOHVDD= 5.0 V VIN= VDDor 0.0 V 01 1, 2, 3 4.95 V VDD= 10.0 V VIN= VDDor 0.0 V 1, 2, 3 9.95 VDD= 15.0 V VIN= VDDor 0.0 V 1, 2, 3 14.95 Low-level output voltage VOLVDD= 5.0 V VIN= 0.0 V or VDD1, 2, 3 0.05 V VDD= 10.0 V VIN= 0.0 V or VDD1, 2, 3 0.05 VDD= 15.0 V VIN= 0.0 V or VDD1,

32、2, 3 0.05 Low-level input voltage VIL1/ VDD= 5.0 V VOUT= 0.5 V or 4.5 V 1, 2, 3 1.5 V VDD= 10.0 V VOUT= 1.0 V or 9.0 V 1, 2, 3 3.0 VDD= 15.0 V VOUT= 1.5 V or 13.5 V 1, 2, 3 4.0 High-level input voltage VIH1/ VDD= 5.0 V VOUT= 0.5 V or 4.5 V 1, 2, 3 3.5 V VDD= 10.0 V VOUT= 1.0 V or 9.0 V 1, 2, 3 7.0 V

33、DD= 15.0 V VOUT= 1.5 V or 13.5 V 1, 2, 3 11.0 Low-level output current IOLVDD= 5.0 V VOUT= 0.4 V 1, 2, 3 0.3 mA VDD= 10.0 V VOUT= 0.5 V 1, 2, 3 0.65 VDD= 15.0 V VOUT= 1.5 V 1, 2, 3 2.2 High-level output current IOHVDD= 5.0 V VOUT= 4.6 V 1, 2, 3 -0.3 mA VDD= 10.0 V VOUT= 9.5 V 1, 2, 3 -0.65 VDD= 15.0

34、 V VOUT= 13.5 V 1, 2, 3 -2.2 Input current IINVDD= 15 V 1, 2, 3 1.0 A Input capacitance CINVIN= 0.0 V, See 4.3.1b 4 7.5 pF Quiescent current IDDVDD= 5.0 V 1, 2, 3 10.0 A VDD= 10.0 V 1, 2, 3 20.0 VDD= 15.0 V 1, 2, 3 30.0 Functional tests See 4.3.1c 7, 8 See footnotes at end of table. Provided by IHSN

35、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 77059 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 Table I. Electrical performance characteristics Continued. Test Symbol Test cond

36、itions -55C TC +125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max Propagation delay time tPHL3/ CL= 50 pF minimum RL= 200 k VDD= 5.0 V 01 9 320 ns VDD= 10.0 V 2/ 130 VDD= 15.0 V 2/ 100 CL= 50 pF minimum RL= 200 k 2/ VDD= 5.0 V 10, 11 480 VDD= 10.0 V 195 VDD= 15.0 V 15

37、0 tPLH3/ CL= 50 pF minimum RL= 200 k VDD= 5.0 V 9 420 VDD= 10.0 V 2/ 170 VDD= 15.0 V 2/ 130 CL= 50 pF minimum RL= 200 k 2/ VDD= 5.0 V 10, 11 630 VDD= 10.0 V 255 VDD= 15.0 V 195 Transition time tTHL, tTLH3/ CL= 50 pF minimum RL= 200 k VDD= 5.0 V 9 200 ns VDD= 10.0 V 2/ 100 VDD= 15.0 V 2/ 80 CL= 50 pF

38、 minimum RL= 200 k 2/ VDD= 5.0 V 10, 11 300 VDD= 10.0 V 150 VDD= 15.0 V 120 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 77059 REVI

39、SION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 Table I. Electrical performance characteristics Continued. Test Symbol Test conditions -55C TC +125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max High-level output voltage VOHVDD= 5.0 V 2/ VIN= 0.0 V or VDD02 1, 2, 3 4.95 V V

40、DD= 10.0 V 2/ VIN= 0.0 V or VDD1, 2, 3 9.95 VDD= 15.0 V VIN= 0.0 V or VDD1, 2, 3 14.95 Low-level output voltage VOLVDD= 5.0 V 2/ VIN= VDDor 0.0 V 1, 2, 3 0.05 V VDD= 10.0 V 2/ VIN= VDDor 0.0 V 1, 2, 3 0.05 VDD= 15.0 V VIN= VDDor 0.0 V 1, 2, 3 0.05 Low-level input voltage VIL1/ VDD= 5.0 V VOUT= 0.5 V

41、 or 4.5 V 1, 2, 3 1.5 V VDD= 10.0 V VOUT= 1.0 V or 9.0 V 1, 2, 3 3.0 VDD= 15.0 V VOUT= 1.5 V or 13.5 V 1, 2, 3 4.0 High-level input voltage VIH1/ VDD= 5.0 V VOUT= 0.5 V or 4.5 V 1, 2, 3 3.5 V VDD= 10.0 V VOUT= 1.0 V or 9.0 V 1, 2, 3 7.0 VDD= 15.0 V VOUT= 1.5 V or 13.5 V 1, 2, 3 11.0 High-level outpu

42、t current IOH4/ VDD= 5.0 V VOUT= 4.6 V 1, 2, 3 -0.36 mA VDD= 10.0 V VOUT= 9.5 V 1, 2, 3 -0.9 VDD= 15.0 V VOUT= 13.5 V 1, 2, 3 -2.4 Low-level output current IOL4/ VDD= 5.0 V VOUT= 0.4 V 1, 2, 3 0.36 mA VDD= 10.0 V VOUT= 0.5 V 1, 2, 3 0.9 VDD= 15.0 V VOUT= 1.5 V 1, 2, 3 2.4 Input current IINVDD= 18.0

43、V 1, 2, 3 1.0 A Input capacitance CINVIN= 0.0 V, See 4.3.1b 4 7.5 pF Quiescent current IDDVDD= 5.0 V 2/ 1, 2, 3 7.5 A VDD= 10.0 V 2/ 15.0 VDD= 15.0 V 2/ 30.0 VDD= 20.0 V 5/ 150.0 Functional tests See 4.3.1c 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networkin

44、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 77059 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 Table I. Electrical performance characteristics Continued. Test Symbol Test conditions -55C TC +125C unless otherwise spe

45、cified Device type Group A subgroups Limits Unit Min Max Propagation delay time tPHL3/ CL= 50 pF minimum RL= 200 k VDD= 5.0 V 02 9 250 ns VDD= 10.0 V 2/ 120 VDD= 15.0 V 2/ 90 CL= 50 pF minimum RL= 200 k 2/ VDD= 5.0 V 10, 11 375 VDD= 10.0 V 180 VDD= 15.0 V 135 tPLH3/ CL= 50 pF minimum RL= 200 k VDD=

46、5.0 V 9 250 VDD= 10.0 V 2/ 120 VDD= 15.0 V 2/ 90 CL= 50 pF minimum RL= 200 k 2/ VDD= 5.0 V 10, 11 375 VDD= 10.0 V 180 VDD= 15.0 V 135 Transition time tTHL, tTLH3/ CL= 50 pF minimum RL= 200 k VDD= 5.0 V 9 200 ns VDD= 10.0 V 2/ 100 VDD= 15.0 V 2/ 80 CL= 50 pF minimum RL= 200 k 2/ VDD= 5.0 V 10, 11 300

47、 VDD= 10.0 V 150 VDD= 15.0 V 120 1/ VIHand VILtests are not required if applied as forcing functions for the VOHand VOLtests. 2/ This condition is guaranteed, if not tested, to the limits specified in table I. 3/ See figure 4 for switching waveforms and test circuit. 4/ Subgroups 2 and 3 maybe guara

48、nteed, if not tested, to the limits specified in table I. 5/ At -55C test is performed with VDD= 18 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 77059 REVISION LEVEL F SHEET 9 DSCC FORM 2234 APR 97 Device types All Case outlines C and D Terminal number Terminal symbol 1 OUT A 2 IN 1A 3 IN 2 A 4 IN 3A 5 IN 4A 6 NC 7 VSS8 NC 9 IN 1B 10 IN 2B 11 IN 3B 12 IN 4B 13 OUT B 14 VDDNC = No

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1