1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R104-97. CFS 96-11-18 Monica L. Poelking B Changes in accordance with NOR 5962-R291-97. CFS 97-05-06 Monica L. Poelking C Incorporate Revisions A and B. Update boilerplate to MIL-PRF-38535 requirements. LTG 01-
2、11-01 Thomas M. Hess D Add device types 02 and 03. Add test circuit to figure 4. Add die type B to appendix A. Update boilerplate and editorial changes throughout. LTG 04-08-02 Thomas M. Hess E Correct radiation features for device types 02 and 03 in section 1.5 and add footnote 8/. Correct footnote
3、s 2/ and 7/ in Table IA. Correct SEP test limits in table IB. Correct paragraph 4.4.4.1. Update boilerplate paragraphs to current MIL-PRF-38535 requirements.- MAA 09-10-05 Thomas M. Hess F Correct radiation features in section 1.5 and on table IA and table IB. - LTG 11-02-24 David Corbett G Add equi
4、valent test circuits and footnote 5 to figure 4. Delete class M requirements. - MAA 12-10-25 Thomas M. Hess H Add footnote 4/ for capacitance limit for measurements of propagation delay time to table IA. MAA 13-09-12 Thomas M. Hess REV SHEET REV H H H H H H H H H H SHEET 15 16 17 18 19 20 21 22 23 2
5、4 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND
6、AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, 8-BIT SERIAL-IN /PARALLEL-OUT SHIFT REGISTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-04-24 REVISION LEVEL H SIZE A CAGE CODE 67268 5
7、962-96556 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E528-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96556 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97
8、1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a
9、 choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96556 01 V X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (s
10、ee 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circui
11、t function as follows: Device type Generic number Circuit function 01 54ACS164 Radiation hardened, 8-bit serial-in/parallel- out shift register 02 54ACS164E Enhanced to both devices radiation hardened, 8-bit serial-in /parallel-out shift register 03 54ACS164E Enhanced to both devices radiation harde
12、ned, 8-bit serial-in /parallel-out shift register 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlin
13、e(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V.
14、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96556 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range
15、 (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (sol
16、dering, 5 seconds) +300C Thermal resistance, junction-to-case (JC): Case outlines C and X (device type 01) . See MIL-STD-1835 Case outline X (device types 02 and 03) . 15C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 . 1.0 W Device types 02 and 03 . 3.2 W
17、4/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD): Device type 01 . +4.5 V dc to +5.5 V dc Device types 02 and 03 . +3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (TC) . -55C to +1
18、25C Maximum input rise and fall time at VDD= 4.5 V (tr, tf) . 1 ns/V 5/ 1.5 Radiation features. 6/ Maximum total dose available: Device type 01 (dose rate = 50 300 rad (Si)/s) 1 Mrad (Si) 7/ Device type 02 (effective dose rate = 1 rad (Si)/s) . 1 Mrad (Si) 8/ Device type 03 (dose rate = 50 300 rad (
19、Si)/s) 500 Krad (Si) 7/ Single event phenomenon (SEP): Device type 01: No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV/(mg/cm2) 9/ No latch-up occurs at effective LET (see 4.4.4.4) 120 MeV/(mg/cm2) 9/ Device types 02 and 03: No SEU occurs at effective LET (see 4.4.4.4) . 108 MeV/(mg/cm2) 9/ No
20、 latch-up occurs at effective LET (see 4.4.4.4) 120 MeV/(mg/cm2) 9/ Dose rate upset (20 ns pulse) (device types 01, 02 and 03) . 1 x 109rad (Si)/s 9/ 10/ Dose rate induced latch-up . None 9/ Dose rate survivability (device types 01, 02 and 03) . 1 x 1012rad (Si)/s 9/ 1/ Stresses above the absolute m
21、aximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VD
22、Drange and case temperature range of -55C to +125C unless otherwise specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ(max) - TC(max) . JC5/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 6/ Radiation testing is performed on
23、the standard evaluation circuit. 7/ Device types 01 and 03 are tested in accordance with MIL-STD-883, method 1019, condition A. 8/ Device type 02 is irradiated at dose rate = 50 - 300 rad (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose speci
24、fied. The effective dose rate after extended room temperature anneal = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, or lower, environment. 9/ Limits are guaranteed by design or
25、process, but not production tested unless specified by the customer through the purchase order or contract. 10/ This limit is applicable for device types 01, 02, 03 with VDD 4.5 V. Device types 02 and 03 do not meet this limit at VDD 4.5 V. Provided by IHSNot for ResaleNo reproduction or networking
26、permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96556 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards
27、, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEP
28、ARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these
29、documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless
30、otherwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are avai
31、lable online at http:/www.astm.org or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD20 Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS devices. JESD78 - IC Latc
32、h-Up Test. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201-2107.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references c
33、ited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT
34、 DRAWING SIZE A 5962-96556 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modifie
35、d in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dime
36、nsions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figur
37、e 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4. 3.2.6 Radiation exposure circ
38、uit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specif
39、ied herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. T
40、he electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufac
41、turer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q a
42、nd V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compl
43、iance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as r
44、equired for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96556 DLA LAND AND MARITIME COLU
45、MBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ 2/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 3/ Unit Min Max High level input voltage VIH02, 03 3.0 V 1, 2, 3 2
46、.1 V All 4.5 V 1, 2, 3 3.15 All 5.5 V 1, 2, 3 3.85 Low level input voltage VIL02, 03 3.0 V 1, 2, 3 0.9 V All 4.5 V 1, 2, 3 1.35 All 5.5 V 1, 2, 3 1.65 High level output voltage VOHFor all inputs affecting output under test VIN= VDDor VSSIOH= -100 A 02, 03 3.0 V 1, 2, 3 2.75 V For all inputs affectin
47、g output under test VIN= VDDor VSSIOH= -100 A All 4.5 V 1, 2, 3 4.25 V Low level output voltage VOLFor all inputs affecting output under test VIN= VDDor VSSIOL= +100 A 02, 03 3.0 V 1, 2, 3 0.25 V For all inputs affecting output under test VIN= VDDor VSSIOL= +100 A All 4.5 V 1, 2, 3 0.25 V Input curr
48、ent high IIHFor input under test VIN= VDDFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A Input current low IILFor input under test VIN= VSSFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A Output current (source) IOH 4/ For output under test, VOUT= VDD- 0.4 V For all other inputs, VIN = VDDor VSS02, 03 3.0 V and 3.6 V 1, 2, 3 -6.0 mA For output under test VOUT= VDD- 0.4 V For all other inputs, VIN = VDDor VSSAll 4.5 V and 5.5 V 1, 2, 3 -8.0 mA Output current (sink) IOL 4/ For output under test VOUT= 0.4 V; For all other inputs VIN=
