DLA SMD-5962-99526 REV A-2005 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ALTERABLE (IN-SYS REPROGRAMMABLE) 3 3 V 512 MACROCELL PROGRAMMABLE LOGIC DEVICE MONOLITHIC SILICON《微型电路 .pdf

上传人:赵齐羽 文档编号:701362 上传时间:2019-01-01 格式:PDF 页数:25 大小:212.13KB
下载 相关 举报
DLA SMD-5962-99526 REV A-2005 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ALTERABLE (IN-SYS REPROGRAMMABLE) 3 3 V 512 MACROCELL PROGRAMMABLE LOGIC DEVICE MONOLITHIC SILICON《微型电路 .pdf_第1页
第1页 / 共25页
DLA SMD-5962-99526 REV A-2005 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ALTERABLE (IN-SYS REPROGRAMMABLE) 3 3 V 512 MACROCELL PROGRAMMABLE LOGIC DEVICE MONOLITHIC SILICON《微型电路 .pdf_第2页
第2页 / 共25页
DLA SMD-5962-99526 REV A-2005 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ALTERABLE (IN-SYS REPROGRAMMABLE) 3 3 V 512 MACROCELL PROGRAMMABLE LOGIC DEVICE MONOLITHIC SILICON《微型电路 .pdf_第3页
第3页 / 共25页
DLA SMD-5962-99526 REV A-2005 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ALTERABLE (IN-SYS REPROGRAMMABLE) 3 3 V 512 MACROCELL PROGRAMMABLE LOGIC DEVICE MONOLITHIC SILICON《微型电路 .pdf_第4页
第4页 / 共25页
DLA SMD-5962-99526 REV A-2005 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ALTERABLE (IN-SYS REPROGRAMMABLE) 3 3 V 512 MACROCELL PROGRAMMABLE LOGIC DEVICE MONOLITHIC SILICON《微型电路 .pdf_第5页
第5页 / 共25页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update and as part of five year review. tcr 05-12-14 Raymond Monnin REV SHET REV A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC

2、N/A PREPARED BY Kenneth Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ELECTRICALLY ALTERAB

3、LE (IN-SYS REPROGRAMMABLE), 3.3 V 512 MACROCELL, PROGRAMMABLE LOGIC DEVICE, MONOLITHIC AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 00-12-04 SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-99526 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E122-06 Provided by IHSNot for

4、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99526 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class le

5、vels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflecte

6、d in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 99526 01 Q Z C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. D

7、evice classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates

8、a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Toggle Speed (MHz) 01 CY37512VP 512 Macrocell CPLD 66 1.2.3 Device class designator. The device class designator is a single letter identifying the product

9、 assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case o

10、utline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Z See figure 1 208 Quad flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendi

11、x A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99526 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratin

12、gs. 1/ Supply voltage range (VCC)- -0.5 V dc to +4.6 V dc Programming supply voltage range (VPP) - 3.0 V dc to 3.6 V dc DC input voltage range - -0.5 V dc to +7.0 V dc Maximum power dissipation - 3.3 W 2/ Lead temperature (soldering, 10 seconds) - +260C Thermal resistance, junction-to-case (JC): Cas

13、e outline Z - 7.2 C/W Junction temperature (TJ) - +150C 3/ Storage temperature range - -65C to +150C Endurance - 25 erase/write cycles (minimum) Data retention- 10 years (minimum) 1.4 Recommended operating conditions. 4/ Case operating temperature Range (TC) - -55C to +125C Supply voltage relative t

14、o ground (VCC) - +3.0 V dc minimum to +3.6 V dc maximum Ground voltage (GND) - 0 V dc Input high voltage (VIH)- 2.0 V dc minimum Input low voltage (VIL) - 0.8 V dc maximum 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and hand

15、books form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT O

16、F DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs). MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these do

17、cuments are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device.

18、Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Must withstand the added PDdue to short circuit test (e.g., IOS). 3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with meth

19、od 5004 of MIL-STD-883. 4/ All voltage values in this drawing are with respect to VSS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99526 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION L

20、EVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are the issues of the documents cited in the solicitation. ELECTRONICS INDUSTRIES ASSOC

21、IATION (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organ

22、izations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes prec

23、edence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or

24、 as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B

25、devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The ca

26、se outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance

27、characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup ar

28、e defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “

29、5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The

30、certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

31、RD MICROCIRCUIT DRAWING SIZE A 5962-99526 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to

32、supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to l

33、isting as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certi

34、ficate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of c

35、hange of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility

36、and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A).

37、 3.11 Processing CPLDs. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.11.1 Erasure of CPLDs. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.6 herein. 3.11.2 Pr

38、ogrammability of CPLDs. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.7 herein. 3.11.3 Verification of erasure or programmed CPLDs. When specified, devices shall be verified as either programmed (see 4.7 herein) to the sp

39、ecified pattern or erased (see 4.6 herein). As a minimum, verification shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the l

40、ot. 3.12 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitor. This reprogrammability test shall be done only for initial characterization and after any design or process changes which may affect the reprogrammability of the device. The methods and proced

41、ures may be vendor specific, but shall be under document control and shall be made available upon request. 3.13 Data Retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design or pr

42、ocess changes which may affect data retention. The methods and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon

43、 request of the acquiring or preparing activity, along with the test data. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99526 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET

44、 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions 3.0 V VCC 3.6 V -55oC TC +125oC unless otherwise specifiedGroup A Subgroups Device type Min Max Unit High Level output voltage VOHVCC= 3.0 V, VIL= 0.8V IOH= -3.0 mA, VIH= 2.0 V 1/ 2.4 V Low level

45、output voltage VOLVCC= 3.0 V, IOL= 6.0 mA VIL= 0.8 V, VIH= 2.0 V 1/ 0.5 V High level input voltage 2/ VIH2 5.5 V Low level input voltage 2/ VIL-0.5 0.8 V Input load current IIXVIN= 0 V or VCC, with Busshold off -10 +10 A Output leakage current IOZVO= GND or VCC= Max V, Output disabled, Busshold off

46、-50 +50 A Output short circuit current 3/ 4/ IOSVCC= 3.6 V, VOUT= 0.5 V -30 -160 mA Power supply current 5/ ICCVCC= 3.6 V, IOUT= 0 mA, VIN= 0 V and 3.6 V f = 1.0 MHz 600 mA Input bus hold low sustained current 3/ IBHLVCC= 3.0 V,VIL= 0.8 V +75 A Input bus hold high sustained current 3/ IBHHVCC= 3.0V,VIH= 2.0 V -75 A Input bus hold low sustained overdrive current 3/ IBHLOVCC= 3.6 V +500 A Input bus hold high sustained overdrive current 3/ IBHHOVCC= 3.6V 1, 2, 3 01 -500 A See footnotes at end of table. Provided by IHSNot for ResaleNo

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1