1、BRITISH STANDARDBS EN 61340-3-1:2007Electrostatics Part 3-1: Methods for simulation of electrostatic effects Human body model (HBM) electrostatic discharge test waveformsThe European Standard EN 61340-3-1:2007 has the status of a British StandardICS 17.220.99; 29.020g49g50g3g38g50g51g60g44g49g42g3g5
2、8g44g55g43g50g56g55g3g37g54g44g3g51g40g53g48g44g54g54g44g50g49g3g40g59g38g40g51g55g3g36g54g3g51g40g53g48g44g55g55g40g39g3g37g60g3g38g50g51g60g53g44g42g43g55g3g47g36g58BS EN 61340-3-1:2007This British Standard was published under the authority of the Standards Policy and Strategy Committee on 31 Augu
3、st 2007 BSI 2007ISBN 978 0 580 54943 4National forewordThis British Standard is the UK implementation of EN 61340-3-1:2007. It is identical to IEC 61340-3-1:2006. It supersedes BS EN 61340-3-1:2002 which is withdrawn.The UK participation in its preparation was entrusted to Technical Committee GEL/10
4、1, Electrostatics.A list of organizations represented on this committee can be obtained on request to its secretary.This publication does not purport to include all the necessary provisions of a contract. Users are responsible for its correct application.Compliance with a British Standard cannot con
5、fer immunity from legal obligations. Amendments issued since publicationAmd. No. Date CommentsEUROPEAN STANDARD EN 61340-3-1 NORME EUROPENNE EUROPISCHE NORM July 2007 CENELEC European Committee for Electrotechnical Standardization Comit Europen de Normalisation Electrotechnique Europisches Komitee f
6、r Elektrotechnische Normung Central Secretariat: rue de Stassart 35, B - 1050 Brussels 2007 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members. Ref. No. EN 61340-3-1:2007 E ICS 17.220.99; 29.020 Supersedes EN 61340-3-1:2002English version Electro
7、statics - Part 3-1: Methods for simulation of electrostatic effects - Human body model (HBM) electrostatic discharge test waveforms (IEC 61340-3-1:2006) lectrostatique - Partie 3-1: Mthodes pour la simulation des effets lectrostatiques - Formes donde dessai des dcharges lctrostatiques pour le modle
8、du corps humain (HBM) (CEI 61340-3-1:2006) Elektrostatik - Teil 3-1: Verfahren zur Simulation elektrostatischer Effekte - Prfwellenformen der elektrostatischen Entladung fr das Human Body Model (HBM) (IEC 61340-3-1:2006) This European Standard was approved by CENELEC on 2007-07-01. CENELEC members a
9、re bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to
10、 the Central Secretariat or to any CENELEC member. This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Secretariat has th
11、e same status as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Cyprus, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands,
12、 Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland and the United Kingdom. EN 61340-3-1:2007 2 Foreword The text of document 101/236/FDIS, future edition 2 of IEC 61340-3-1, prepared by IEC TC 101, Electrostatics, was submitted to the IEC-CENELEC parallel vote and was
13、 approved by CENELEC as EN 61340-3-1 on 2007-07-01. This European Standard supersedes EN 61340-3-1:2002. The major change of this document is that it no longer contains the application to semiconductor devices. The following dates were fixed: latest date by which the EN has to be implemented at nati
14、onal level by publication of an identical national standard or by endorsement (dop) 2008-04-01 latest date by which the national standards conflicting with the EN have to be withdrawn (dow) 2010-07-01 _ Endorsement notice The text of the International Standard IEC 61340-3-1:2006 was approved by CENE
15、LEC as a European Standard without any modification. _ 3 EN 61340-3-1:2007 ELECTROSTATICS Part 3-1: Methods for simulation of electrostatic effects Human body model (HBM) electrostatic discharge test waveforms 1 Scope This part of IEC 61340 describes the discharge current waveforms used to simulate
16、human body model (HBM) electrostatic discharges (ESD) and the basic requirements for equipment used to develop and verify these waveforms. This standard covers HBM ESD waveforms for use in general test methods and for application to materials or objects, electronic components and other items for ESD
17、 withstand-test or performance-evaluation purposes. The specific application of these HBM ESD waveforms to non-powered semiconductor devices is covered in IEC 60749-26. The waveforms defined in this standard are not intended for use in the testing of powered electronic systems for electromagnetic co
18、mpatibility (EMC), which is covered in IEC 61000-4-2. 2 Terms and definitions For the purposes of this document, the following terms and definitions apply. 2.1 unit under test UUT material, object, item or product to be subjected to the HBM ESD test 2.2 UUT failure condition in which a UUT does not
19、meet one or more specified parameters as a result of the ESD test 2.3 ESD withstand voltage maximum applied ESD voltage level that does not cause failure parameter limits to be exceeded, provided that all UUTs stressed at lower levels have also passed EN 61340-3-1:2007 4 3 Equipment 3.1 HBM ESD wave
20、form generator This equipment produces an electrostatic discharge current pulse simulating an HBM ESD event for application to the UUT. The equivalent waveform generator circuit and tester evaluation loads are illustrated in Figure 1. 3.2 Waveform verification equipment 3.2.1 General Equipment capab
21、le of verifying the HBM current waveform is defined in this standard. This equipment includes but is not limited to a waveform recording system, a high-voltage resistor and a current transducer. 3.2.2 Waveform recording system The waveform recording system shall have a minimum single shot bandwidth
22、of 350 MHz. 3.2.3 Evaluation loads Two evaluation loads are necessary to verify the functionality of the waveform generator: a) load 1: a shorting wire; b) load 2: a 500 low-inductance resistor, with a tolerance of 1 % appropriately rated for the voltages that will be used for waveform qualification
23、. The lead length of the evaluation loads (shorting wire or resistor) shall be as short as possible and consistent with connecting the evaluation load to the appropriate reference terminals (A and B in Figure 1) while passing through the current transducer. 3.2.4 Current transducer The current trans
24、ducer shall have a minimum bandwidth of 350 MHz. 4 HBM current waveform requirements 4.1 General Prior to UUT testing, HBM ESD waveform generator qualification shall ensure waveform integrity of the discharge current through both a shorting wire and a resistive load. The shorting wire waveform requi
25、rements are specified in Figures 2a and 2b for all positive and negative voltages defined in Table 1, while the resistive load waveform requirements for 1 000 V are shown in Figure 3 and Table 1. 4.2 Waveform qualification and verification Equipment qualification shall be performed during initial ac
26、ceptance testing. Re-qualification is required whenever equipment repairs are made that may affect the waveform. Additionally, the waveforms shall be verified periodically. 5 EN 61340-3-1:2007 If a test fixture or circuit board is used to perform UUT testing, the test fixture board shall also be use
27、d during equipment qualification tests. If the waveform no longer meets the waveform parameters described in Table 1 and Figures 2a, 2b and 3, all ESD testing performed after the previous satisfactory waveform check shall be considered invalid. Key 1 HBM ESD waveform generator (nominally 100 pF/1,5
28、k) 2 terminal A 3 switch 4 terminal B 5 UUT 6 evaluation load 7 shorting wire 8 resistance R = 500 9 current transducer Figure 1 HBM ESD waveform generator equivalent Requirements for Figure 1: a) The evaluation loads (7 and 8) are specified in 3.2.2. b) The current transducer (9) is specified in 3.
29、2.3. c) The reversal of terminals A (2) and B (4) to achieve dual polarity is not permitted. d) The switch (3) is closed 10 ms to 100 ms after the pulse delivery period of each single HBM pulse to ensure that the UUT and any test fixture are not left in a charged state. NOTE 1 The performance of the
30、 waveform generator is strongly influenced by parasitic capacitance and inductance. NOTE 2 Precautions should be taken in the design of the waveform generator to avoid recharge transients and double pulses. NOTE 3 A resistance in series with the switch would ensure a slow discharge of the UUT. IEC 6
31、78/02 EN 61340-3-1:2007 6 Table 1 Waveform specification Level IPSpeak current through a shorting wire A (10%) IPSpeak current through a 500 resistor A Equivalent voltage V 1 0,17 - 250 2 0,33 500 3 0,67 0,375 to 0,550 1 000 4 1,33 - 2 000 5 2,67 4 000 6 5,33 - 8 000 90 %10 %5 ns per divisionIpstrIr
32、IEC 679/02Figure 2a Typical current waveform through a shorting wire (tr) 7 EN 61340-3-1:2007 Ips36,8 %td100 ns per division00IEC 680/02Figure 2b Typical current waveform through a shorting wire (td) Figure 2 Typical current waveforms Requirements for Figure 2: The current pulse shall meet the follo
33、wing requirements: trpulse rise time 2 ns to 10 ns; tdpulse decay time 150 ns 20 ns; lrthe maximum allowed peak-to-peak ringing shall be less than 15 % of Ipswhen measured parallel to the current waveform and decay with no observable ringing 100 ns after the start of the pulse. EN 61340-3-1:2007 8 9
34、0 % 10 % 0 0 5 ns per division IprtrIEC 681/02 Figure 3 Typical current waveform through a 500 resistor Requirements for Figure 3: The current pulse shall meet the following characteristics: trpulse rise time 5 ns to 25 ns. 5 Evaluation of ESD robustness of the UUT 5.1 General Application conditions
35、 appropriate to the UUT shall be established for the following parameters: sample size; pulse count; pulse interval; stress voltage levels; test temperature and humidity; relevant parameter specification limits indicating ESD test failure. 5.2 Evaluation of UUTs that have electrical terminals Evalua
36、tion of the ESD robustness of a UUT that has electrical terminals will often require that the terminals are classified into different types, for example, input, output, power supply or ground. Each non-power supply terminal shall then be tested (one at a time) with respect to power supply or ground
37、terminals. 9 EN 61340-3-1:2007 In the case of the evaluation of UUTs that have electrical terminals, its purpose should be ti find the weakest pin combination and failure threshold for HBM. Thus, UUTs that do not have many electrical terminals are generally tested for HBM on all pin combination; but
38、, in the case of UUTs having many electrical terminals, it is possible to select the test pin combination as a pin grouping. The specific application of the HBM waveform to determine the ESD robustness of semiconductor devices is given in IEC 60749-26. 5.3 Evaluation of UUTs that do not have electri
39、cal terminals In the case where the UUT is a material or an object that does not have electrical terminals (for example, packaging materials), it may be necessary to apply the waveform to the UUT via applied electrodes or other appropriate means. 6 Test procedure An appropriate test procedure shall
40、be defined according to the specific application. NOTE 1 The specific application of the HBM waveform to determine the ESD robustness of semiconductor devices is given in IEC 60749-26. It is permitted to use any voltage level as the starting stress level. One pulse of both polarities shall be applie
41、d for all UUT terminal or electrode combinations and stress levels. NOTE 2 Some types of UUT may have “fail windows” in which no failures are sustained over a range of applied ESD stress levels (for example, no fail at 500 V, fail at 1 000 V, no fail at 1 500 V and fail again from 2 000 V upwards).
42、It is recommended that no stress level should be missed in order to detect such fail windows. It is permitted to use separate samples for each UUT stress combination and/or polarity. It is permitted to use the same samples at the next higher voltage level if all UUT samples pass the failure criteria
43、 at testing after stressing at the lower level. If a different UUT sample is stressed at each level and/or combination and/or polarity, it is permitted to perform UUT testing after all samples have been stressed. 7 Failure criteria A UUT is considered to have experienced an ESD failure if it does no
44、t meet all relevant parameter specifications following ESD test. 8 HBM ESD withstand classification An appropriate classification system for the application shall be established if required. NOTE The ESD withstand voltage will normally be an appropriate basis for classification but in some cases oth
45、er bases may be used. In many cases it will be sufficient to refer to the UUT ESD withstand voltage without the need for an additional classification system. The basic HBM ESD withstand classification applicable to semiconductor devices is given in IEC 60749-26. EN 61340-3-1:2007 10 Bibliography IEC
46、 60749-26, Semiconductor devices Mechanical and climatic test methods Part 26: Electrostatic discharge (ESD) sensitivity testing human body model (HBM) NOTE Harmonized as EN 60749-26:2006 (not modified). IEC 61000-4-2:2001, Electromagnetic compatibility (EMC) Part 4-2: Testing and measuring techniqu
47、es Electrostatic immunity discharge test _ blankBS EN 61340-3-1:2007BSI389 Chiswick High RoadLondonW4 4ALBSI British Standards InstitutionBSI is the independent national body responsible for preparing British Standards. It presents the UK view on standards in Europe and at the international level. I
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