1、 ETSI TR 102 580 V1.1.1 (2007-10)Technical Report Terrestrial Trunked Radio (TETRA);Release 2;Designers Guide;TETRA High-Speed Data (HSD);TETRA Enhanced Data Service (TEDS)ETSI ETSI TR 102 580 V1.1.1 (2007-10) 2 Reference DTR/TETRA-04178 Keywords data, service ETSI 650 Route des Lucioles F-06921 Sop
2、hia Antipolis Cedex - FRANCE Tel.: +33 4 92 94 42 00 Fax: +33 4 93 65 47 16 Siret N 348 623 562 00017 - NAF 742 C Association but non lucratif enregistre la Sous-Prfecture de Grasse (06) N 7803/88 Important notice Individual copies of the present document can be downloaded from: http:/www.etsi.org T
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6、estriction extend to reproduction in all media. European Telecommunications Standards Institute 2007. All rights reserved. DECTTM, PLUGTESTSTM and UMTSTM are Trade Marks of ETSI registered for the benefit of its Members. TIPHONTMand the TIPHON logo are Trade Marks currently being registered by ETSI
7、for the benefit of its Members. 3GPPTM is a Trade Mark of ETSI registered for the benefit of its Members and of the 3GPP Organizational Partners. ETSI ETSI TR 102 580 V1.1.1 (2007-10) 3 Contents Intellectual Property Rights8 Foreword.8 1 Scope 9 2 References 9 2.1 Informative references9 3 Definitio
8、ns and abbreviations.11 3.1 Definitions11 3.2 Abbreviations .16 4 TETRA layered architecture 19 4.1 OSI reference model.19 4.2 TETRA protocol stack21 4.2.1 Protocol architecture.21 4.2.2 Inter-layer communication22 4.2.3 Testable boundaries 22 4.2.4 Service access points 23 5 Overview of TETRA High-
9、Speed Data (HSD)23 5.1 Introduction 23 5.2 Physical layer and lower MAC layer enhancements 24 5.3 Higher protocol layer enhancements 25 5.4 Services and applications .25 6 Physical layer and lower MAC 26 6.1 Physical resources 26 6.2 TDMA frame structure.27 6.3 Slot structure 28 6.3.1 Slot structure
10、 for phase modulation 28 6.3.2 Slot structure for QAM .29 6.4 Radio transmission burst structure .30 6.4.1 Burst structure for phase modulation30 6.4.2 Burst structure for QAM.32 6.4.3 Burst structure formats34 6.4.3.1 Phase modulated burst formats .34 6.4.3.2 QAM modulated burst formats .34 6.5 Cha
11、nnel structure35 6.5.1 Logical channels in phase modulation35 6.5.1.1 Control CHannel (CCH) .35 6.5.1.2 Traffic CHannel (TCH).36 6.5.2 QAM channels 36 6.5.3 Mapping of logical channels into physical channels.37 6.5.3.1 Mapping in phase modulation.37 6.5.3.2 Mapping in QAM37 6.6 Reference configurati
12、on .38 6.6.1 Reference configuration for phase modulation.38 6.6.2 Reference configuration for QAM39 6.7 Modulation .39 6.7.1 Phase modulation39 6.7.2 QAM.41 6.7.2.1 Modulation types.41 6.7.2.2 Bit to symbol mapping41 6.7.2.3 Comparison of gross bit rates45 6.8 Error control (lower MAC) 45 6.8.1 Gen
13、eral45 6.8.2 Error control schemes for phase modulation 47 6.8.3 Error control schemes for QAM channels 48 ETSI ETSI TR 102 580 V1.1.1 (2007-10) 4 6.8.3.1 Slot Information CHannel - QAM/Uplink (SICH-Q/U)49 6.8.3.2 Slot Information CHannel - QAM/Downlink (SICH-Q/D).49 6.8.3.3 Access Assignment CHanne
14、l - QAM (AACH-Q).50 6.8.3.4 Signalling Channel - QAM/Half slot Uplink (SCH-Q/HU) 50 6.8.3.5 Signalling CHannel - QAM/Uplink (SCH-Q/U).51 6.8.3.6 Signalling CHannel - QAM/Downlink (SCH-Q/D) and Broadcast Network CHannel - QAM (BNCH-Q).51 6.8.3.7 Signalling CHannel - QAM/Random Access (SCH-Q/RA)51 6.8
15、.4 Coding for phase modulation52 6.8.4.1 General52 6.8.4.2 16-state Rate-Compatible Punctured Convolutional (RCPC) codes .52 6.8.4.3 Shortened (30,14) Reed-Muller block codes.54 6.8.4.4 Cyclic Redundancy Check (CRC) block code 54 6.8.5 Coding for QAM channels55 6.8.5.1 8-state Parallel Concatenated
16、Convolutional Code (PCCC) for QAM .55 6.8.5.1.1 Encoding by the upper 8-state RSC encoder of rate 1/256 6.8.5.1.2 Interleaving by the quadratic-congruence interleaver57 6.8.5.1.3 Encoding the interleaved bits by the lower 8 state RSC encoder of rate 1/2.58 6.8.5.1.4 Merging the systematic and parity
17、 bits for the PCCC encoder58 6.8.5.1.5 Puncturing scheme for the PCCC encoder 58 6.8.5.1.6 Puncturing mask for the PCCC encoder with coding rate 2/3 .58 6.8.5.1.7 Puncturing mask for the PCCC encoder with coding rate 1/2 .59 6.8.5.2 (16,5) Reed-Muller (RM) code for QAM .59 6.8.6 Interleaving for pha
18、se modulation 59 6.8.7 Interleaving for QAM channels 60 6.8.8 Scrambling60 6.8.8.1 General60 6.8.8.2 Scrambling method .61 6.9 Synchronization and channel estimation 61 6.9.1 Frequency and time synchronization 61 6.9.1.1 Requirements 61 6.9.1.1.1 BS requirements 61 6.9.1.1.2 MS requirements .61 6.9.
19、1.2 Initial synchronization via pi/4-DQPSK plus pi/8-D8PSK .61 6.9.1.3 Synchronization in QAM channels .62 6.9.2 Channel estimation in QAM channels 65 6.10 Power control .66 6.11 Link adaptation in TETRA high speed channels66 7 Higher layer protocol66 7.1 Protocol architecture.66 7.1.1 General packe
20、t data aspects 66 7.1.2 Architecture of the TETRA protocol stack.67 7.2 Multimedia Exchange layer68 7.2.1 General MEX features 68 7.2.2 MEX routing services .68 7.2.3 MEX precedence 69 7.3 Subnetwork Dependent Convergence Protocol layer .69 7.3.1 Outline of SNDCP 69 7.3.2 Application-level QoS param
21、eters72 7.3.3 QoS negotiation 74 7.3.4 QoS filtering information for secondary PDP contexts 74 7.3.5 Assignment of PDP contexts to layer 2 communication links 75 7.3.6 Choice of layer 2 communication link parameters .75 7.3.7 Selection of physical channel76 7.3.7.1 Initial PDCH access 76 7.3.7.2 Cha
22、nging PDCH requirements76 7.3.8 Header and data compression .76 7.3.9 Data priority in SNDCP77 7.3.10 Reconnection following cell reselection.77 7.4 Operation of the data link layer (layer 2) protocol .77 7.4.1 Structure of the data link layer77 ETSI ETSI TR 102 580 V1.1.1 (2007-10) 5 7.4.2 Control
23、channel usage.79 7.4.2.1 Common control channels and assigned channels 79 7.4.2.2 pi/4-DQPSK channel80 7.4.2.3 D8PSK channel .80 7.4.2.4 QAM channel80 7.4.2.5 Slot and TDMA frame arrangement on uplink and downlink.81 7.4.2.6 Minimum mode.82 7.4.2.7 Discontinuous downlink transmissions - time-sharing
24、 mode82 7.4.2.8 Independent allocation of uplink and downlink 82 7.4.3 Communication links provided by the LLC .83 7.4.3.1 General83 7.4.3.2 Basic link 83 7.4.3.3 Advanced link .84 7.4.3.4 Segment size for advanced link.85 7.4.3.5 Layer 2 signalling87 7.4.4 Some MAC processes.87 7.4.4.1 General87 7.
25、4.4.2 Addressing 88 7.4.4.2.1 General 88 7.4.4.2.2 Layer 2 addressing.89 7.4.4.3 Random access89 7.4.4.3.1 General 89 7.4.4.3.2 Overview of random access channel on 25 kHz channel 91 7.4.4.3.3 Overview of random access channel on 50 kHz, 100 kHz or 150 kHz QAM channel93 7.4.4.4 Reserved access.94 7.
26、4.4.4.1 Use of reserved access.94 7.4.4.4.2 Basic slot granting .94 7.4.4.4.3 Multiple slot granting 95 7.4.4.5 Channel allocation.96 7.4.4.6 Power control 96 7.4.4.6.1 General 96 7.4.4.6.2 Open loop power control .97 7.4.4.6.3 Closed loop power control.97 7.5 Link adaptation on D8PSK or QAM channel
27、.97 7.5.1 General97 7.5.2 Algorithm using predefined choice of bit rates.98 7.5.3 Algorithm adapting with channel conditions 99 7.6 Energy economy and napping 101 7.6.1 Energy economy and dual watch on common control channel.101 7.6.1.1 Energy economy mode101 7.6.1.2 Dual watch mode 102 7.6.2 Nappin
28、g on assigned channel102 7.7 Data priority .103 7.8 Scheduled access 105 7.8.1 General105 7.8.2 MS operation for sending scheduled messages.106 7.8.3 Schedule timing 106 7.9 Cell and channel selection107 7.9.1 General107 7.9.2 Cell selection/reselection 107 7.9.2.1 Cell selection.107 7.9.2.2 Cell re
29、selection107 7.9.3 Assigned channel types and channel classes.108 7.9.4 Network broadcast 111 7.9.4.1 Broadcast information.111 7.9.4.2 Acquiring cell synchronization and network information.112 7.9.5 Serving cell surveillance.112 7.9.6 PDCH channel assignment .112 7.9.7 Assigned channel replacement
30、113 7.9.8 MS MAC measurements and path loss calculation.113 7.10 Circuit mode calls.114 7.11 Short data and SDS-TL 115 ETSI ETSI TR 102 580 V1.1.1 (2007-10) 6 7.12 Registration and group attachment.115 7.13 Classes of MS.116 7.13.1 General116 7.13.2 MS fast switching or duplex capability.117 7.13.2.
31、1 Frequency half duplex operation.117 7.13.2.1.1 Frequency half duplex capability.117 7.13.2.1.2 Fast switching capability .117 7.13.2.2 Frequency full duplex operation .118 8 System and RF aspects.118 8.1 Frequency bands and spectrum allocation issues .118 8.1.1 European spectrum allocations .118 8
32、.1.2 Position outside Europe 119 8.2 TX specifications119 8.2.1 General119 8.2.1.1 Transmitter power classes and nominal power .120 8.2.1.2 Transmitter output power time mask 120 8.2.2 Transmitter specifications for phase modulation 122 8.2.2.1 Vector error magnitude requirement at symbol time for p
33、hase modulation122 8.2.2.2 Maximum adjacent power levels for phase modulation123 8.2.2.3 Wide-band noise limits for phase modulation.123 8.2.3 Transmitter specifications for QAM.124 8.2.3.1 Vector error magnitude requirement at symbol time for QAM.124 8.2.3.2 Limits to emission on adjacent channels
34、in QAM.125 8.2.3.3 Wideband noise limits in QAM 125 8.3 RX specifications .126 8.3.1 General126 8.3.2 Receiver specifications for phase modulation.127 8.3.2.1 Receiver class127 8.3.2.2 Dynamic reference sensitivity performance for phase modulation .128 8.3.2.3 Static reference sensitivity performanc
35、e for phase modulation.129 8.3.2.4 Receiver performance at reference interference ratios for phase modulation .131 8.3.3 Receiver specifications for QAM .132 8.3.3.1 Dynamic reference sensitivity performance for QAM132 8.3.3.2 Static reference sensitivity performance for QAM .135 8.3.3.3 Receiver pe
36、rformance at reference interference ratios for QAM 136 8.3.3.3.1 Adjacent channel interference .136 8.3.3.3.2 Co-channel interference.136 8.3.3.4 Relationship between 0bEN and receiver sensitivity137 8.4 Propagation models 137 8.4.1 Modified Hata model137 8.4.2 Urban environment .138 8.4.3 Suburban
37、environment138 8.4.4 Open area environment.139 8.4.5 Reduced expression for Lm versus distance .139 8.4.6 Slow varying log-normal component (Ls) 139 8.4.6.1 Components of received signal strength .139 8.4.6.2 Coverage probability at a distance r from transmitter .140 8.4.7 Tap delay model for perfor
38、mance simulations140 8.4.8 High velocity (e.g. trainborne) TETRA HSD .141 9 Channel performance in QAM channels 144 9.1 Permissible modulation, coding rate and channel BW combinations.144 9.2 Coded channel performance .145 9.2.1 Noise performance145 9.2.2 Interference performance156 9.3 Uncoded chan
39、nel performance .157 9.3.1 Noise performance157 9.3.2 Interference performance165 10 Typical link budget calculations.166 10.1 System parameters166 ETSI ETSI TR 102 580 V1.1.1 (2007-10) 7 10.2 Downlink model.167 10.3 Uplink model168 10.4 Range versus throughput trade-offs168 10.4.1 Range of TETRA HS
40、D channels in urban environment.168 10.4.2 Range of TETRA HSD channels in suburban environment .170 10.4.3 Range consideration in open area and rural environments .171 10.4.4 Range evaluation for uncoded channels171 10.4.5 TETRA HSD channel coverage comparison 172 10.4.6 Throughput vs. range for TET
41、RA HSD channels.173 10.5 Range extension methods.174 10.5.1 Non-antenna methods .174 10.5.2 Antenna methods 174 11 Location Information Protocol (LIP) signalling.176 12 Peripheral Equipment Interface (PEI) 176 13 Security.176 13.1 Introduction to TETRA security.176 13.2 TETRA air interface security
42、.176 13.2.1 Air interface security components 176 13.2.2 Security classes.177 13.2.3 Encryption.178 13.2.3.1 Encryption algorithms.178 13.2.3.2 Encryption mechanism178 13.2.3.3 Basic key stream allocation.178 13.2.3.4 PDU association on phase modulation channels.178 13.2.3.5 PDU association on QAM c
43、hannels179 13.2.3.5.1 Fixed-mapping KSS allocation scheme.179 13.2.3.5.2 Offset-mapping KSS allocation scheme180 13.2.4 Authentication.181 13.2.5 Air interface key management 181 13.2.6 Enable and disable 181 13.3 TETRA end-to-end security .181 14 Air to Ground Operation 181 Annex A: Simulation set-
44、up 182 Annex B: Channel estimation algorithms in QAM channels.183 B.1 Interpolation-based CE.183 B.2 Bayesian CE .184 Annex C: Impact of channel estimation errors on MER186 History 188 ETSI ETSI TR 102 580 V1.1.1 (2007-10) 8 Intellectual Property Rights IPRs essential or potentially essential to the
45、 present document may have been declared to ETSI. The information pertaining to these essential IPRs, if any, is publicly available for ETSI members and non-members, and can be found in ETSI SR 000 314: “Intellectual Property Rights (IPRs); Essential, or potentially Essential, IPRs notified to ETSI
46、in respect of ETSI standards“, which is available from the ETSI Secretariat. Latest updates are available on the ETSI Web server (http:/webapp.etsi.org/IPR/home.asp). Pursuant to the ETSI IPR Policy, no investigation, including IPR searches, has been carried out by ETSI. No guarantee can be given as
47、 to the existence of other IPRs not referenced in ETSI SR 000 314 (or the updates on the ETSI Web server) which are, or may be, or may become, essential to the present document. Foreword This Technical Report (TR) has been produced by ETSI Technical Committee Terrestrial Trunked Radio (TETRA). ETSI
48、ETSI TR 102 580 V1.1.1 (2007-10) 9 1 Scope The present document is aimed at a readership with a technical background wishing to have an overall understanding of the TEDS architecture, parameters and features for embarking on any of the following activities before reading the standard: 1) design and
49、development of TETRA 2 network and equipment; 2) system and technical support activity in procurement phases of a TETRA 2 network; 3) upgrading of an existing TETRA network to a TEDS capable network; 4) applications development activity. This list is not exhaustive. Although the emphasis is on a readership with a technical background a selective reading of the contents will also be of benefit to non-technical personnel engaged on other aspects of a TETRA 2 network. No market or user type information nor a competitive analysis with respect to other technologies or standards are
