1、JEDEC PUBLICATION Guideline for Assessing the Current-Carrying Capability of the Leads in a Power Package System JEP145 FEBRUARY 2003 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Boa
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10、3) 907-7559 JEDEC Publication No. 145 Page 1 JEDEC GUIDELINE FOR ASSESSING THE CURRENT-CARRYING CAPABILITY OF THE LEADS IN A POWER PACKAGE SYSTEM (Formerly JEDEC Board Ballot JCB-02-60, formulated under the cognizance of the JC-25 Committee on Transistors.) 1 Scope A method for determining the dc cu
11、rrent-carrying capability of the leads that pass current from a semiconductor to the outside world of the package system for power products is discussed. This method is applicable to systems where the lead becomes the constraining element of the current-carrying portion of the package. The method ca
12、n be applied to any semiconductor/package system. The purpose of this publication is to define a method for determining the maximum current-carrying capability of the leads in a semiconductor/packaging system where temperature considerations are the crucial criteria for this determination. 2 Terms a
13、nd definitions I = current, (A) T = temperature, (C, K) = resistivity, (-cm) = thermal conductivity,(W/cm-K) L = length of conductor, (cm) A = cross sectional area of the conductor, (cm2) d = diameter of the conductor, (cm) T = change in temperature, (C, K) k = constant dependent upon the type of ma
14、terial used in MIL specification estimates for maximum current. JEDEC Publication No. 145 Page 2 3 Reference formulas The following reference formulas may be used in theoretical assessment models, these are not all encompassing. temperature rise due to current in a conductor with resistivity, the Rd
15、s(on) of a MOSFET device and its thermal resistance, Rthjc, are the principal constraining properties of the MOSFET/package system once the temperature extremes for the system are defined and if the current capability of the package leads is not exceeded. Using the two reference formulas, 1.2 and 1.
16、3, we can approximate the current-carrying capability of the materials in the leads if we know the temperature excursion that will be allowed. An example of this is the wire bonds often used to connect the semiconductor to the lead portion of the packaging system. These leads can often only be theor
17、etically assessed and not actually measured for their temperature changes due to limited access to their location inside a plastic encapsulant. However, there may be other constraints that can be assessed more easily by application of empirical methods. As an example, when the devices maximum curren
18、t capability is less than the current capability of the leads of the package, then the systems current capability is strictly due to the device. This limitation can be assessed in the procedure outlined below. JEDEC Publication No. 145 Page 3 4 Theoretical assessment (contd) When the maximum current
19、 of the device exceeds the calculated current capability of the package leads then the procedure outlined below can also ascertain the most reasonable rating that can be assigned to the device/package system. 5 Test setup 5.1 Package mounting The package is mounted on a heat sink to control the pack
20、age temperature. The heat sink setup shall be capable of allowing the package/case temperature to be measured. Steps should be taken to shield this setup in such a way that convection cooling from extraeneous sources do not affect the temperature measurements needed. The most critical part of the se
21、tup is the method for attaching the leads of the device under test to a power supply such that the amount of heat sinking to the leads is measurable. This can be accomplished using a very large buss bar configuration and measuring the temperature of the bar and the actual lead temperature simultaneo
22、usly. (See Figure 1.) The attachment of the lead to the bar should be through a solder or other appropriate positive contact lead mounting technique. Figure 1 Idealized block diagram locating thermocouples JEDEC Publication No. 145 Page 4 5 Test setup (contd) 5.1 Package mounting (contd) Considerati
23、on for mounting of different lead configurations should be taken into account. Examples are: Surface mount packages the bus bar should make full contact to the entire length of the bottom of the lead that normally makes contact with a circuit board. Through hole mounted parts should have no more the
24、n 20% of the total available length in contact with the buss bar. These considerations are a function of the application that the parts are used in and should be thought out prior to being implemented. It is prudent engineering practice to document the actual methods used for reproducibility of resu
25、lts. 5.2 Temperature measurement system The temperature measurement system must be capable of measuring the package temperature, the lead temperature and other fixture or mounting related temperatures that need to be referenced during testing. This can be done using various methods such as IR micros
26、copy, temperature sensitive paints, liquid crystals, or a thermocouple. JEDEC Publication No. 84 is a useful reference for measuring lead temperatures. It is prudent engineering practice to use confirming temperature measurement techniques if there are concerns that the measurement technique may be
27、affecting the temperature being measured for a specific parameter. 5.3 Power supply system The power supply that will provide the current for the device must be capable of projected currents for the device or the device/package lead combination. The voltages for these supplies are usually not requir
28、ed to be very high since the current limitations are principally due to the resistance inherent in the very conductive (low voltage drop) leads of this device/system. It is important to remember that the measurements being done are at a steady state condition so the power supply must have the wattag
29、e rating needed to supply the required conditions. 5.4 Current-measurement system The current of the test lead must be measured so that there is a defined value assigned to a set of temperature conditions. The use of a Kelvin sense resistor and measurement of the voltage across it or an inductive cu
30、rrent pickup for large enough and long enough leads, are possible methods for appropriate current measurement. JEDEC Publication No. 145 Page 5 6 Procedure Using a setup that controls the package configuration/application a fixed amount of current shall be attained. The following measurements shall
31、be made. 1) The current passing through the lead. 2) The temperature of the lead. This shall be measured at the highest temperature on the lead. 3) The temperature of the die should also be measured using a TSP (temperature sensitive parameter). This is necessary to assure that the die temperature a
32、ctually does not exceed the rating of the device. Die temperatures can be measured using IR microscopy but there are problems with doing this in a sealed package and removing the seal may also change the characteristics of the package/system. Several recommened techniques for assessing TSP of device
33、s can be found in standards such as MIL-STD-750 test methods 3161, 3131, or 3101, or JEDEC Standard 24-3 and 24-6. Care should be taken in defining appropriate time delays and conditions that minimize device and equipment interactions that may produce erroneous results. 4) Package temperature, to as
34、sess package heating, and lead heat sink temperature must also be measured to determine if there is anomalous heat flow due to the setup or the system. 5) The data shall be put into a tabular form and shall be evaluated based on the temperature excursions that the leads experience. The principal met
35、hodology for evaluation shall be determined for the specific package/application. 7 Assessment criteria The evaluator shall establish boundary conditions to assess criteria that would determine acceptable lead currents for the package/application. For example, some criteria may include hermeticity l
36、oss due to excess temperatures, integrity of the plastic due to excessive temperatures, safety considerations due to excess temperatures, excessive temperatures that cause loss of assembly integrity, or possibly flow of heat into the heat source (usually the semiconductor die) that causes excessive
37、temperatures at the die. JEDEC Publication No. 145 Page 6 8 Conclusion The determination of the maximum current capability of a device/package system can be done using a modeling approach and/or using empirical methods outlined in this guideline. The modeling approach will give engineers and designe
38、rs the ability to set up specification and application limits. The empirical methods are tools used to verify and assess any anomalous variations that may appear in the actual application. Rev. 9/02 Standard Improvement Form JEDEC JEP145The purpose of this form is to provide the Technical Committees
39、 of JEDEC with input from the industry regarding usage of the subject standard. Individuals or companies are invited to submit comments to JEDEC. All comments will be collected and dispersed to the appropriate committee(s). If you can provide input, please complete this form (can be edited with Acro
40、bat Reader) and return to: JEDEC Attn: Publications Department 2500 Wilson Blvd. Suite 220 Arlington, VA 22201-3834 Fax: 703.907.7583 1. I recommend changes to the following: Requirement, paragraph number Test method number Paragraph number The referenced paragraph number has proven to be: Unclear Too Rigid In Error Other 2. Recommendations for correction: 3. Other suggestions for document improvement: Submitted by Name: Phone: Company: E-mail: Address: City/State/Zip: Date:
