1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change VIL. Change propagation delay times. Delete minimum limits from propagation delays. Convert to military drawing format. 86-07-01 M. A. Frye B Change power dissipation. 86-10-01 M. A. Frye C Add vendor CAGE 27014. Change code identification
2、 number to 67268. Page 2: Power dissipation limit lowered. Page 4: Propagation delay times lowered. Change footnotes to table I. Delete IOLand IOHtests from table I. Add figure 3. Case outline B no longer available from an approved source of supply. Editorial changes throughout. 88-03-03 M. A. Frye
3、D Change power dissipation and footnote in 1.3. Editorial changes throughout. 88-04-19 M. A. Frye E Changes in accordance with NOR 5962-R086-92. 92-07-06 Monica L. Poelking F Redraw with changes. Update to current requirements. Editorial changes throughout. - gap 05-12-14 Raymond Monnin CURRENT CAGE
4、 CODE 67268 THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-
5、3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-POWER SCHOTTKY TTL, AND GATES, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 85-05-13 MONOLITHIC SILICON AMSC N/A REVISION LEVEL
6、 F SIZE A CAGE CODE 14933 84143 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E065-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET
7、 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 84143 01 B
8、 X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS21 Dual 4-input positive AND gates 1.2.2 Case outline(s). The case outline(s)
9、 are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style B GDFP4-F14 14 flat C GDIP1-T14 or CDIP2-T14 14 dual-in-line D GDFP1-F14 OR CDFP2-F14 14 flat 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-
10、PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc minimum to 7.0 V dc maximum Input voltage range . -1.5 V dc at -18 mA to 7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 12.65 mW 1/ Lead temperature (soldering, 10 seconds) . +300C Th
11、ermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL): TC= +25C 0.8 V
12、 dc TC= +125C 0.7 V dc TC= -55C . 0.8 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test; e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen
13、se from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks for
14、m a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE
15、 STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are avai
16、lable online at http:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited
17、herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix
18、A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML produc
19、t in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or functi
20、on of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical d
21、imensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Logic diagram and terminal connections. The logic diagram and terminal connections shall be as specified on figure 1. 3.2.3 Truth table.
22、 The truth table shall be as specified on figure 2. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as
23、 specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo repr
24、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall
25、be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced
26、with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein
27、). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required
28、 in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activi
29、ty retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-3
30、8535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A or D. The
31、 test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent
32、 specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo r
33、eproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. 1/ Limits Unit Test Symbol Conditions -
34、55C TC +125C unless otherwise specified Group A subgroups Min Max VIL= 0.7 V 2 V High level output voltage VOHVIH= 2.0 V, VCC= 4.5 V, IOH= -0.4 mA 2/ 3/ VIL= 0.8 V 1, 3 2.5 VIL= 0.7 V 2 V Low level output voltage VOLVIH= 2.0 V, VCC= 4.5 V, IOL= 4 mA 3/ 4/ VIL= 0.8 V 1, 3 0.4 Input clamp voltage VICV
35、CC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.5 V IIH1VCC= 5.5 V, VIN= 2.7 V, All other inputs = 0.0 V 1, 2, 3 20 A High level input current IIH2VCC= 5.5 V, VIN= 7.0 V, All other inputs = 0.0 V 1, 2, 3 0.1 mA Low level input current IILVCC= 5.5 V, VIN= 0.4 V, All other inputs = 4.5 V 1, 2, 3 -0.1 mA Output curr
36、ent IOVCC= 5.5 V, VOUT= 2.25 V 5/ 1, 2, 3 -20 -112 mA ICCHVCC= 5.5 V, VIN 4.5 V (all inputs) 1, 2, 3 1.4 mA Supply current ICCLVCC= 5.5 V, VIN 0.4 V (all inputs) 1, 2, 3 2.3 mA Functional tests See 4.3.1c 6/ 7, 8 Propagation delay time, VCC= 4.5 V 9, 10, 11 4 15 ns A, B, C, and D to Y tPLHVCC= 5.5 V
37、 9, 10, 11 4 15 ns VCC= 4.5 V 9, 10, 11 2 12 ns tPHLCL= 50 pF 10%, RL= 500 5% See figure 3 7/ VCC= 5.5 V 9, 10, 11 2 12 ns 1/ Unused inputs that do not directly control the pin under test must be 2.5 V or 0.4 V. Unused inputs shall not exceed 5.5 V or go less than 0.0 V. No inputs shall be floated.
38、2/ One input to gate under test must be = VIH, the other inputs shall be 2.0 V. 3/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the VIL maximum or VIHminimum inp
39、ut. 4/ One input to gate under test must = VIL, the other inputs shall be 2.0 V. 5/ The output conditions have been chosen to produce a current that closely approximates one-half of the true short circuit output current, IOS. Not more than one output will be tested at a time and the duration of the
40、test condition shall not exceed 1 second. 6/ Functional tests shall be conducted at input test conditions of 0.0 V VIL VOLand VOH VIH VCC. 7/ The propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking
41、permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 FIGURE 1. Logic diagram and terminal connections. INPUTS OUTPUT A B C D Y H H H H H L X X X L X L X X L X X L X L
42、X X X L L FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes p
43、robe and jig capacitance. 2. All input pulses have the following characteristics: PRR 10MHz, duty cycle = 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. FIGURE 3. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo repro
44、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordan
45、ce with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1*, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3
46、 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified
47、 in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state li
48、fe test conditions, method 1005 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. Provided
