1、 SMD-5762-92229 REV B W 9999996 0089406 IT8 DEFENSE LOGISTICS AGENCY DEFENSE SUPPLY CENTER, COLUMBUS 3990 EAST BROAD STREET COLUMBUS, OH 43216-5000 IN REPLY REFER TO: DSCC-VAC (Mr. Miesse/(614) 692-0543 (DSN 850) SEP 2 6 1996 SUBJECT: Notice of Revision (NOR) 5962-R198-96 for Standard Microcircuit D
2、rawing (SMD) 5962-92229 MilitaryIIndustry Distribution The enclosed NOR is approved for use effective as of the date of the NOR. In accordance with MIL-STD-100 SMD holders should, as a minimum, handwrite those changes described in the NOR to sheet 1 of the subject SMD. After completion, the NOR shou
3、ld be attached to the subject SMD for future reference. Those companies who were listed as approved sources of supply prior to this action have agreed to actions taken on devices for which they had previously provided DSCC a certificate of compliance. This is evidenced by an existing active current
4、certificate of compliance on file at DSCC with a DSCC record of verbal coordination. The certificate of compliance for these devices is considered concurrence with the new revision unless DSCC is otherwise notified. If you have comments or questions, please contact Mr. Bernard Miesse at (614) 692-05
5、43 (DSN 850). 1 Encl Chief, Custom Microelectronics Team Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-92227 REV B 9999996 0089407 034 NOTICE OF REVISION (NOR) THIS REVISION DESCRIBED BELOW HAS BEEN AUTHORIZED FOR THE DOCUMENT LISTED. 1. D
6、ATE (WMMDD) Form Approved 96-09-03 OMB NO. 0704-0188 3990 East Broad Street Columbus, OH 43216-5000 I. TYPED NAME (First, Middle lnifial, Last) ublic reporting burden for this diectiwi is estimated to average 2 hours per response induding the me for reviewing instntcons searching existing data sourc
7、es athetin and maintainin the data needed and aunpleting and reviewing the dieciin of infonnatiwi. Send mmments regardin this burden estimate or any othei sped 4 this colledion o!infonnation indidin su estions for reducing this burden to Department of Defense Washington fieadquarters Sdces Directoni
8、e )r Information Operations and Re brtc. 121% JeRrson Davis Hi hway. Suite 12dl. Arlington. VA 22202-43d2, and to the Office of Management nd Budget. a ewok Redudion rn ect oi add “A“. Rev status of sheets: For sheets 1, 3, 6, 8, 11. add “A“. Sheet 3: 1.4, recomnended operating conditions, maximum h
9、igh level output current (I H), change limit to “-12 ma“ for all device types. 1.4, low level output current, IoL, change limit from “48 nd“ to “32 nd“ Revision level block: add “A“. Sheet 6: High level output voltage, V “-12 nd“ for all devices; k? add “A“. NOR 5962-R180-93“. , change device type t
10、o “All“, in test conditions column change I to ), for device types 01,03 and 05, change group A I Sheet 11: w, delete last sentence. 2. CAGECOOE 3. mlR wo. 67268 5962-R180-93 4. CAGECODE 5. IKKlMENTwo. 5962-92229 67268 7. REVISIOW m (Current) New (New) A 8. ECP. no registered users b. ACTIVITY AUTHO
11、RIZED TO APPROVE CHANGE FOR GOVERNMENT DESC-ECC 12. ACTIVITY ACCOMPLISHING REVISION DESC-ECC I Joseph A. Kerby I 93-06-18 Form 1695, JUL 88 Previous editions are obsolete. SIGNATURE AND TITLE DATE (YYMMDD) Monica L. Poelking 93-06-18 Chief, Custom Microelectronics REVISION COMPLETED (Signature) DATE
12、 (YYMMDD) Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SUD-5962-72229 REV A 999999b OOLibLLL 448 LTR DESCRIPTION DATE (YR-HO-DA) APPROVED w SHEET REV I I I SHEET 15 16 17 PMIC N/A STANDARDIZED MILITARY DRAWING PREPARED BY Phu H. Nguyen - CHECKED B
13、Y THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 AMSC NIR Thomas J. Ricciuti APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE DESC FORM 193 JUL 91 DISTRIBUTION STATEMENT A. MICROCIRCUIT, DIGITAL,
14、 FAST CMOS, 9 BIT, BUS INTERFACE, D REGISTERS WITH CLOCK ENABLE, ASYNCHRONOUS CLEAR, THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS AND LIMITED OUTPUT VOLTAGE SWING, MONOLITHIC SILICON 93-04-26 I SFE I CAGE CODE REVISION LEVEL 67268 5962-92229 SHEET 1 OF 21 5962-E144-93 proved for public release; distri
15、bution is unlimited. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SCOPE 1.1 Scopc. This drawing font a port of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliabi
16、lity (device classes B, Q, and MI and space application (device classes S and VI, nd a choice of use outlines and leed finishes are available and are reflected in the Part or Identifying Nuibcr (PIN). Device class W microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MI
17、L-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant noo-JAN devices“. available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN. Uhen I 1.2 E. The PIN shall be as .houn in the following example: STANDARDIZED SIZE MILITARY DRAWING A DEFENSE
18、ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL X - 5962 92229 - M n K I I I I I I I I I I I I Lead Case Devi ce Device 1 RHA Federal 5962-92229 SmET 2 I +i I VA I -10.0 I I I -0.1 I I I I -2.0 I I STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 5962-92
19、229 DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-92229 REV A 9999996 004bLL7 966 l I I I I I I I I I I I i 2.0 I mA Quiescent supply I AIcc I For input under test TTL input levels I g/ I For all o er inputs I All 15.
20、5 V I 1,2,3 current delta, VIN = VFk - 2.1 v 3005 I I VIN = Vcc or GND I I I I I I high I I VIN = Vcc or GND I I I I I I I I_ I I I i 1.5 I mA OE = GND I All 15.5 V I 1,2,3 For all other inputs I 1 Quiescent supply current output I ICCH I 1 3005 I I See footnotes at end of table. I Negative input I
21、VIc- I For input under test IIN = -18 mA clamp voltage I Hin I nax I I :,03, 14.5 V I 1,2,3 I 1 -1.2 I V I 106 I I 3 Input current high 3010 I I VIN = Vcc or GND I- II I I I I I 3 For input under test I 0:,03, 15.5 V I 1.2 Input current Low 3009 I IIL I V = GND I ForIll1 other inputs 13 I 0.1 I l 1.
22、0 I I -5.0 I I I 02/04, I I It2 I I 106 I I 13 -0.1 I I I -1.0 I I 3005 I I I l I STANDARDIZED SIZE 5962-92229 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 7 f Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH
23、S-,-,-SMD-57b2-92229 REV A 7999996 004bLL8 8T2 = i uiescent supply current output LOU MM uiescent supply current output three-state 3005 otal supply current I I i I .ou teve1 ground and the preferred method and limits are guaranteed. Classes 8, S, Q, and V shall use the preferred method. Uhen the te
24、st is ICCT is calculated as follows: ICCT = Icc + DHNThIcc + ICCD(fCp/2 +fiNi) where I = Quiescent supply current (any I or IcCH) Dic= Duty cycle for TTL inputs at 3.4SL N = Number of TTL inputs at 3.4 V AIcc = Quiescent supply current delta, TTL inputs at 3.4 V - Dynamic powei ;upply current caused
25、 by an input transition pair (HLH or LHL) D=-Clock frequency for registered devices (fCp = O for nonregistered devices) fi = Input frequency Ni = Number of inputs at f. 1 This test is for qualification only. Ground and V output and are used to measure the niagnitude of insuccd noise caused by other
26、simultaneously switching outputs. The test is performed on a low noise bench test fixture. with 500 S of load resistance and a minimum of 50 pF of load capacitance (see figure 4). Only chip capacitors and resistors shall be used. outputs. capacitors shall be placed in parallel from Vcc to ground. de
27、termined by the device manufacturer. quiet output using a 1 GHr minimum bandwidth oscilloscope with a 5M input impedance. The device inputs shall be conditioned such that all outputs are at a high nominal V level. The device inputs shall then be conditioned such that they switch simultaneously and t
28、he output under ?est remains at V other outputs possible are switched from VOH to Voe: VOHy and VOHP are then measured from the nominaPHVOH level to the largest negative and positive peaks, respec ively see figure 4). outputs not under test switching from VOL to VOH. The device inputs shall be condi
29、tioned such that all outputs are at a low nominal V shall then be conditioned such that they switch simultaneously and the output underohst remains at V other outputs possible are switched from V to the largest positive and negative peaksfLrespectively !see figure 4). outputs not under test switchin
30、g from VOH to VOL. For device types 01, 03, and 05 limits will be added when these device types become available from an approved source of supply. bounce tests are performed on a non-switching (quiescent) For the device under test, all outputs shall be loaded The output load components shall be loc
31、ated as close as possible to the device It is suggested, that whenever possible, this distance be kept to less than .25 inches. Decoupling The low and high level ground and Vcc bounce noise is measured at the The values of these decoupling capacitors shall be as all This is then repeated with the sa
32、me level. The device inputs as all to VOH: VOL and VOL“ are then measured from the naminaPLVoL level This is then repeated with the same - 13/ Tests shall be performed in sequence, attributes data only. other logic patterns used for fault detection. The test vectors used to verify the truth table sh
33、all, at a minimum, test all functions of each input and output. shall be guaranteed, if not tested, to the truth table in figure 2, herein. in sequence as approved by the qualifying activity on qualified devices. H 2 1.5 V, L 1.5 V. Minimum propagifion delay time limits for Vcc = 4.5 V and 5.5 V are
34、 guaranteed if not tested to the limits specified in table I, herein. For ac tests, all paths must be tested. Functional tests shall include the truth table and All possible input to output logic patterns per function Functional tests shall be performed - 14/ AC limits at V = 5.5 V are equal to the
35、limits at Vcc = 4.5 V and guaranteed by testing at Vcc = 4.5 V. I I I Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SUD-57b2-92229 REV A 779777b 009b122 223 m Terminal synbol n (n = O to 8) - OE evice types hat outlines Terminal number 1 2 3 4 5 6
36、7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Description D f lip-f lop data inputs. Three-state output enable control input. 01,02,03,4,05,06 K and L I 3 I - CLR - EN Termina - OE DO DI D2 03 04 05 D6 D7 D8 CLR GND CP EN Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 w - - “cc - - - - Asynchronous clear
37、control input. Synchronous clock enable control input. symbol NC OE DO DI 02 D3 04 NC D5 D6 07 D8 CLR GND NC CP EN Y8 n Y4 Y5 NC Y4 Y3 Y2 Y1 YO - - “CC I fP Clock (timing) input for the register. Enters data into the register on Low-to 1 high transition. I Yn (n = O to 8) Register three-state output
38、s I I (noninverting). FIGURE 1. Terminal connections. STANDARD1 ZED 5962-91 MI LI TARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5762-92229 REV A D 999999b 0
39、046123 1bT m STANDARDIZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL - I All device types I I I 5962-92229 SHEET 13 H = High voltage levei L = Low voltage level X = Dont care 1 = Lou-to-high transition. 2 = High impedance NC = No change FIGURE 2. Trut
40、h table. FIGURE 3. Loqic diaqram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-0.W a. w STANDARDIZED SIZE MILITARY. DRAWING A DEFEUSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL 1.w 5962-92229 SHEET 14 v: NOTES: CL = 47 pF -0 perce
41、nt, +20 percent chip capacitor plus 2 3 pF of quivalent capacitance from the test jig and probe. R = 450 R *I percent, chip resistor in series with a SIX termination. shall be the 5M characteristic impedance of the coaxial connector to the oscilloscope. Input signal to the device under test: For mon
42、itored outputs, the 5M1 termination VIN = 0.0 V to 3.0 V; duty cycle = 50 percent; fIN 2 1 MHr. tt,tf = 3 ns tl.O ns. limit may be increased up to 10 ns, as needed, maintaining the i1.0 ns tolerance and guaranteeing the results at 3.0 ns 21.0 ns; Skew between any two switching inputs signals (tsk):
43、d 250 ps. For input signal generators incapable of maintaining this values of tr.and tf, the 3.0 ns FIGURE 4. Ground bounce load circuit and waveforms. DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5762-72229 REV A 7977776
44、 00461125 T32 STANDARD1 ZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL DATA INPU 5962-92229 SHEET 15 TIMIffi INPUT ASYNCHROMUS MNTROL INPUT SYNCHRONOUS CONTROL INPUT 3.W 1.5V 0.ov 3 ov 1.5v o ov 3.DV 1.5v 0.ov 3.0V 1 .5v 0.ov 3. OV 1.5v 0.ov - - - INP
45、UT PULSE WIDTH HIGH AND LOW OUTPUT “ OL FIGURE 5. Switching waveforms and test circuit - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-92229 REV A - 9793996 OOlbL2b 977 W STANDARDIZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS
46、SUPPLY CENTER DAYTON, 0310 45444 REVISION LEVEL OTES: Jhen measuring tpLZ and t ihen measuring tpHZ, tpZHyZhpLH and tpHL : V test = open The tpZL and tPy reference waveform is for the output under test with internal conditions such that the output iS 1 IoL except when The tpZH and tpHz reference wav
47、eform is for the output undei test with internal conditions such that the output is at VOH except when disabled by the output enable control. : V test = 7.0 V isabled by the output enable control. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance) RL = 5M3n or equivalent RT =
48、 5On or equivalent Input signal from pulse generetor: V Timing parameters shall be tested at a minimum input frequency of 1 HHz. The outputs are measured one at a time with one transition per measurement. = 0.0 V to 3.0 V; PRR 5 10 HHz; duty cycle = 50 percent; tr 5 2.5 ns; tf 5 2.5 ns; tr and 1: sh
49、all be measured frw 0.3 V to 2.7 V, and 2.7 V to 0.3 V, respectively. 5962-9222 SHEET FIGURE 5. Switching waveforms and test circuit - Continued. DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5762-72229 REV A 9777996 004b127 805 = STANDARDI
