1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R195-96. 96-08-23 Ray Monnin B Updated drawing to meet current MIL-PRF-38535 requirements. glg. 13-06-14 Charles F. Saffle REV B SHEET 35 REV B B B B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 2
2、2 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil
3、 THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS 16-MEG USER-CONFIGURABLE FLASH EEPROM, MONOLITHIC SILICON DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95-12-08 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 59
4、62-95625 SHEET 1 OF 35 DSCC FORM 2233 APR 97 5962-E404-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1
5、. SCOPE 1.1 Scope. This drawing documents three product assurance class levels consisting of non-traditional (device class N), high reliability (device class Q), and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identif
6、ying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 95625 01 N X B Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (
7、see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes N, Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s).
8、 The device type(s) identify the circuit function as follows: Operating temp. Device type Generic number 1/ Circuit function 2/ Access time Endurance range 01 28F008 16 MEG CMOS FLASH EEPROM 85 ns 10,000 cycles -55C to +125C 02 28F008 16 MEG CMOS FLASH EEPROM 100 ns 10,000 cycles -55C to +125C 01 28
9、F008 16 MEG CMOS FLASH EEPROM 85 ns 10,000 cycles -55C to +125C 02 28F008 16 MEG CMOS FLASH EEPROM 100 ns 10,000 cycles -55C to +125C 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements doc
10、umentation Q or V Certification and qualification to MIL-PRF-38535 N Certification and qualification to MIL-PRF-38535 with a non-traditional performance environment 3/ 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator T
11、erminals Package style X See figure 1 56 plastic shrink small-outline package 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38535 for device classes N, Q, and V. 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this docum
12、ent and will also be listed in QML-38535 and MIL-HDBK-103 (see 6.6 herein). 2/ This device is user configurable to either a 1 Meg X 16 or 2 Meg X 8 organization. 3/ Any device outside the traditional performance environment (i.e., an operating temperature range of -55C to +125C and which requires he
13、rmetic packaging). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 4/ Supply
14、voltage range (VCC) 5/ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.2 V dc to +7.0 V dc Storage temperature range (Tstg) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Maximum power dissipation (PD) . . . . . . . . . . . . . . . . . . . .
15、. . . . . . . . . . . . . 1.0 W Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . +300C Junction temperature (TJ) 6/ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150C Thermal resistance, junction-to-case (JC) (case outline X) . .
16、 . . . . . . . . . . 20C/W Voltage on any pin with respect to ground 5/ . . . . . . . . . . . . . . . . . . . . . . . -0.2 V dc to +7.0 V dc VPPsupply voltage with respect to ground 5/ 7/ . . . . . . . . . . . . . . . . . . . . . -0.2 V dc to +14.0 V dc Output short circuit current 8/ . . . . . . .
17、. . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 years, minimum Endurance (All device types) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10,00
18、0 cycles/byte, minimum 1.4 Recommended operating conditions. 9/ Supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5 V dc to +5.5 V dc Alternate supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.15 V dc to +
19、3.45 V dc Device type 01 and 02 operating temperature range (Tcase) . . . . . . . . . . . . -55C to +125C Device type 03 and 04 operating temperature range (Tcase) . . . . . . . . . . . . -40C to +125C Low level input voltage range (VIL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20、. -0.5 V dc to +0.8 V dc High level input voltage range (VIH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.0 V dc to VCC+0.5 V dc High level input voltage range, CMOS (VIH) . . . . . . . . . . . . . . . . . . . . . . . . . +2.0 V dc to VCC+0.5 V dc VPPsupply voltage with respect
21、to ground . . . . . . . . . . . . . . . . . . . . . . . . . 11.4 V dc to 12.6 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specif
22、ied, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Inte
23、rface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document
24、Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 4/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 5/ Minimum dc voltage on input or output pins is
25、 -0.5 V. During voltage transitions, inputs may undershoot to -2.0 V for periods less than 20 ns. Maximum dc voltage on input or output pins is VCC +0.5 V. During voltage transitions outputs may overshoot to VCC +2.0 V for periods less than 20 ns. 6/ Maximum junction temperature shall not be exceede
26、d except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 7/ Maximum dc input voltage on VPP may overshoot to +14.0 V for periods less than 20 ns. 8/ No more than one output shorted at a time. Duration of short circuit should not be greater tha
27、n 1 second. 9/ All voltages are referenced to VSS(ground). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97
28、2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation. JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. (Applications for copies shou
29、ld be addressed to the JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201-2107; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documen
30、ts also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable
31、 laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes N, Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (
32、QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes N, Q and V. 3.2.1 Case
33、outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table shall be as specified on figure 3. 3.2.3.1 Unprogrammed devices. The truth table for un
34、programmed devices shall be as specified on figure 3 herein. When required in screening (see 4.2 herein) or qualification conformance inspection, groups A, B, or C (see 4.4), the devices shall be programmed by the manufacturer prior to test. A minimum of 50 percent of the total number of cells shall
35、 be programmed. 3.2.3.2 Programmed devices. The requirements for supplying programmed devices are not a part of this drawing. 3.2.3.3 Command definitions. The command definitions table shall be as specified on figure 3. 3.2.4 Block diagram. The block diagram shall be as specified on figure 4. 3.2.5
36、Switching test circuits and waveforms. The switching test circuits and waveforms shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation param
37、eter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The pa
38、rt shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product usi
39、ng this option, the RHA designator shall still be marked. Marking for device classes N, Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes N, Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. Provided by IHSNo
40、t for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95625 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. For device classes N, Q and V, a certificate
41、of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the
42、manufacturers product meets, for device classes N, Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes N, Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing
43、. 3.8 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.3.1 and table I. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.9 Processing of flash EEPROMs. All testin
44、g requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.9.1 Conditions of the supplied devices. Devices will be supplied in an unprogrammed or clear state. No provision will be made for supplying programmed devices. 3.9.2 Erasure of flash EE
45、PROMs. When specified, devices shall be erased in accordance with procedures and characteristics specified in 4.5.1. 3.9.3 Programming of flash EEPROMs. When specified, devices shall be programmed in accordance with procedures and characteristics specified in 4.5.2. 3.9.4 Verification of state of fl
46、ash EEPROMs. When specified, devices shall be verified as either written to the specified pattern or cleared. As a minimum, verification shall consist of performing a read of the entire array to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shal
47、l constitute a device failure and the device shall be removed from the lot or sample. 3.10 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammability test shall be done for initial characterization and after any design or process change
48、s which may affect the reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with test data. 3.11 Data retention. A data retention stre
