1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Converted to military drawing format. Add vendor CAGE number 50088 as second source. Changes Code Ident. No. to 67268. 87-11-07 R. P. Evans D Change IOS minimum limits in table I from 30 mA to 15 mA. Update boilerplate to MIL-PRF-38535 requiremen
2、ts. - CFS 03-08-04 Thomas M. Hess E Correct marking requirement in 3.5. Update boilerplate in accordance with MIL-PRF-38535 requirements. Editorial change throughout. - PHN 05-02-17 Thomas M. Hess THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268. REV SHEET REV E E
3、E E E E E E SHEET 15 16 17 18 19 20 21 22 REV STATUS REV E D E E D D D D D D D D D E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY James E. Jamison STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.d
4、la.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Robert P. Evans AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-08-01 MICROCIRCUIT, DIGITAL, FOUR-BIT MICROPROCESSOR SLICE, MONOLITHIC SILICON SIZE A CAGE CODE 67268 84057 AMSC N/A REVISION LEVEL E SHEET 1 OF
5、22 DSCC FORM 2233 APR 97 5962-E176-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84057 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scop
6、e. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 84057 01 Q X Drawing number Device type (see 1.2.1)
7、Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 2901C Four bit microprocessor slice 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as f
8、ollows: Outline letter Descriptive designator Terminals Package style Q GDIP1-T40 or CDIP2-T40 40 Dual-in-line Z See figure 1. 42 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VCC). -0.5 V dc to +7.0 V d
9、c Input voltage range. -0.5 V dc at 12 mA to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/. 1.6 W Lead temperature (soldering, 10 seconds). +300C Maximum junction temperature (TJ) +175C Thermal resistance, junction-to-case (JC): Case Q See MIL-STD-1835 Case Z 9C
10、/W 1.4 Recommended operating conditions. Supply voltage range (VCC). +4.5 V dc to +5.5 V dc Minimum high-level input voltage (VIH) . +2.0 V dc Maximum low-level input voltage (VIL) +0.8 V dc Case operating temperature range (TC) . -55C to +125C _ 1/ Must withstand the added PD due to short circuit t
11、est (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84057 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government
12、 specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION M
13、IL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microc
14、ircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 O
15、rder of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1
16、 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a man
17、ufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may
18、 make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow op
19、tion is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein and on figure 1. 3.2.2 Terminal connec
20、tions. The terminal connections shall be as specified on figure 2. 3.2.3 Truth tables and logic equations. The truth tables and logic equations shall be as specified on figure 3. 3.2.4 Block diagram. The block diagram shall be as specified on figure 4. 3.2.5 Switching waveforms and test circuits. Th
21、e switching waveforms and test circuits shall be as specified on figure 5. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by
22、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84057 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements
23、 shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marke
24、d. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML
25、flow option is used 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of su
26、pply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this d
27、rawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. O
28、ffshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84057 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D
29、SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage Y0, Y1, Y2, Y3, G VOH1 IOH = -1.6 mA 2.4 High level output voltage OVR, P VOH2 IO
30、H = -800 A 2.4 High level output voltage Cn+4 VOH3 IOH = -1.0 mA 2.4 High level output voltage F3, RAM0, RAM3, Q0, Q3 VOH4 VCC = 4.5 V, VIH = 2.0 V, VIL = 0.8 V IOH = -600 A 1, 2, 3 All 2.4 V Output leakage current for F = 0 output ICEX VCC = 4.5 V, VOH = 5.5 V VIH = 2.0 V, VIL = 0.8 V 1, 2, 3 All 2
31、50 A Low level output voltage Y0, Y1, Y2, Y3, G, F = 0 VOL1 IOL = 16 mA 0.5 Low level output voltage OVR, P VOL2 IOL = 8.0 mA 0.5 Low level output voltage Cn+4 VOL3 IOL = 10 mA 0.5 Low level output voltage F3, RAM0, RAM3, Q0, Q3 VOL4 VCC = 4.5 V, VIH = 2.0 V, VIL = 0.8 V IOL = 6.0 mA 1, 2, 3 All 0.5
32、 V Input clamp voltage VIC VCC = 4.5 V, IIH = -18 mA 1, 2, 3 All -1.5 V Low level input current Clock, OE, I0, I1, I2, I6, I8 IIL1 -0.36 Low level input current A0, A1, A2, A3, B0, B1, B2, B3 IIL2 -0.36 Low level input current D0, D1, D2, D3 IIL3 -0.72 Low level input current I3, I4, I5, I7 IIL4 -0.
33、72 Low level input current RAM0, RAM3, Q0, Q3 IIL5 1/ -0.8 Low level input current Cn IIL6 VCC = 5.5 V, VIN = 0.5 V 1, 2, 3 All -3.6 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE
34、A 84057 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Min Max Unit High level in
35、put current Clock, OE, A0, A1, A2, A3, B0, B1, B2, B3, I0, I1, I2, I6, I8 IIH1 20 High level input current D0, D1, D2, D3, I3, I4, I5, I7 IIH2 40 High level input current RAM0, RAM3, Q0, Q3 IIH3 1/ 100 High level input current Cn IIH4 VCC = 5.5 V, VIN = 2.7 V 1, 2, 3 All 200 A IZH1 VOUT = 2.4 V 50 H
36、igh impedance state output current Y0, Y1, Y2, Y3 IZL1 VOUT = 0.5 V -50 IZH2 1/ VOUT = 2.4 V 100 High impedance state output current RAM0, RAM3, Q0, Q3 IZL2 1/ VCC = 5.5 V VOUT = 0.5 V 1, 2, 3 All -800 A Output short circuit current IOS 2/ VCC = 5.5 V, VOUT = 0 V Y0, Y1, Y2, Y3, G, Cn+4, OVR, P, F3,
37、 RAM0, RAM3, Q0, Q3 1, 2, 3 All -15 -85 mA Power supply current ICC VCC = 5.5 V 1, 2, 3 All 280 mA Frequency of operation fMAX 1, 2, 3 All 31 MHz Functional tests See 4.4.1c 7, 8 All tSHL1 30 A3-A0 setup time to positive edge of clock tSLH1 30 tSHL2 15 A3-A0 setup time to negative edge of clock tSLH
38、2 15 tSHL3 30 B3-B0 (source) setup time to positive edge of clock tSLH3 30 tSHL4 15 B3-B0 (source) setup time to negative edge of clock tSLH4 15 tSHL5 15 B3-B0 (DEST) setup time to negative edge of clock tSLH5 CL = 50 5 pF all outputs. See figure 5. 9, 10, 11 All 15 ns See footnotes at end of table.
39、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84057 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Cont
40、inued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max tSHL6 25 D3-D0 (arithmetic mode) setup time to positive edge of clock tSLH6 25 tSHL7 25 D3-D0 (I = X37) setup time to positive edge of clock tSLH7 25 tSHL8 20 Cn setup time to pos
41、itive edge of clock tSLH8 20 tSHL9 30 I2-I0 setup time to positive edge of clock tSLH9 30 tSHL10 30 I5-I3 setup time to positive edge of clock tSLH10 30 tSHL11 10 I8-I6 setup time to negative edge of clock tSLH11 10 tSHL12 12 Q3, Q0 setup time to positive edge of clock tSLH12 12 tSHL13 12 RAM3, RAM0
42、 setup time to positive edge of clock tSLH13 12 tHHL1 2 A3-A0 hold time from positive edge of clock tHLH1 2 tHHL2 2 B3-B0 hold time from positive edge of clock tHLH2 2 tHHL3 0 D3-D0 hold time from positive edge of clock tHLH3 0 tHHL4 0 Cn hold time from positive edge of clock tHLH4 0 tHHL5 0 I8-I0 h
43、old time from positive edge of clock tHLH5 0 tHHL6 0 Q3, Q0 hold time from positive edge of clock tHLH6 0 tHHL7 0 RAM3, RAM0 hold time from positive edge of clock tHLH7 CL = 50 5 pF all outputs. See figure 5. 9, 10, 11 All 0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduct
44、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84057 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125
45、C unless otherwise specified Group A subgroups Device type Limits Unit Min Max tPHL1 48 Delay from A3-A0 to Y3-Y0 tPLH1 48 tPHL2 48 Delay from A3-A0 to F3 tPLH2 48 tPHL3 48 Delay from A3-A0 to Cn+4 tPLH3 48 tPHL4 44 Delay from A3-A0 to G and P tPLH4 44 tPHL5 48 Delay from A3-A0 to F = 0 tPLH5 48 tPH
46、L6 48 Delay from A3-A0 to OVR tPLH6 48 tPHL7 48 Delay from A3-A0 to RAM3 and RAM0 tPLH7 48 tPHL8 48 Delay from B3-B0 to Y3-Y0 tPLH8 48 tPHL9 48 Delay from B3-B0 to F3 tPLH9 48 tPHL10 48 Delay from B3-B0 to Cn+4 tPLH10 48 tPHL11 44 Delay from B3-B0 to G and P tPLH11 44 tPHL12 48 Delay from B3-B0 to F
47、 = 0 tPLH12 CL = 50 5 pF all outputs. See figure 5. 48 tPHL13 48 Delay from B3-B0 to OVR tPLH13 CL = 50 5 pF all outputs. See figure 5. RL = 68, R = 1.5k, Y3-Y0, G 9, 10, 11 All 48 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license
48、from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84057 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max tPHL14 48 Delay from B3-B0 to RAM3 and RAM0 tPLH14 48 tPHL15 37 Delay from D3-D0 (ARITH) to Y3-Y0 tPLH15 37 tPHL16 37 Delay from D3-D0 (ARITH) to F3 tPLH16 37 tPHL17 37 Delay from D3-D0 (ARITH) to Cn+4 tPLH17 37 tPHL18 34 Delay from D3-D
