DLA SMD-5962-96528 REV C-2012 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS TRIPLE 3-INPUT NOR GATE MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R110-97. TVN 96-12-12 Monica L. Poelking B Add limit for linear energy threshold (LET) with no latch-up in section 1.5. Update the boilerplate to the requirements of MIL-PRF-38535. Editorial changes throughout.

2、 TVN 05-08-24 Thomas M. Hess C Update boilerplate paragraphs and radiation paragraphs 4.4.4.1 4.4.4.4 to the current MIL-PRF-38535 requirements. - LTG 12-05-17 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREP

3、ARED BY Larry T. Gauder DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MI

4、CROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, TRIPLE 3-INPUT NOR GATE, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-04-19 REVISION LEVEL C SIZE A CAGE CODE 67268 5962-96528 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E322-12 Provided by IHSNot for ResaleNo reproduction or networking permitted

5、without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q a

6、nd M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the follow

7、ing example: 5962 H 96528 01 V X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PR

8、F-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(

9、s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACS27 Radiation hardened, triple 3-input NOR gate 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requir

10、ements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL

11、-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Pr

12、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (

13、VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD + 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (sold

14、ering, 5 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Maximum power dissipation (PD) . 1.0 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD) +4.5 V dc to +5.5 V dc Input voltage range (VIN) 0.0 V dc to VDDOutput vo

15、ltage range (VOUT). 0.0 V dc to VDDMaximum input rise or fall time at VDD= 4.5 V (tr, tf) 1 ns/V 4/ Case operating temperature range (TC) . -55C to +125C 1.5 Radiation features. 5/ Maximum total dose available (dose rate = 50 300 rads (Si)/s) 1 x 106Rads (Si) Single event phenomenon (SEP): Effective

16、 linear energy transfer (LET), no upsets (see 4.4.4.4) 80 MeV/(mg/cm2) 6/ Effective linear energy transfer (LET), no latch-up (see 4.4.4.4) 120 MeV/(mg/cm2) 6/ Dose rate upset (20 ns pulse) 1 x 109Rads (Si)/s Latch-up . None Dose rate survivability 1 x 1012Rads (Si)/s 1/ Stresses above the absolute

17、maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified V

18、DDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 5/ Radiation testing is performed on the standard evaluation circuit. 6/ Limits obtained during technology characterizati

19、on/qualification, guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96528 DLA

20、LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwis

21、e specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-183

22、5 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Stan

23、dardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersed

24、es applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Manag

25、ement (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construct

26、ion, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.

27、2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms an

28、d test circuit shall be as specified on figure 4. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performanc

29、e characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. Th

30、e electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96528 DLA LAND AND

31、 MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible d

32、ue to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accorda

33、nce with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of complian

34、ce. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as

35、 an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of M

36、IL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each

37、 lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Ver

38、ification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the opt

39、ion of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAND

40、ARD MICROCIRCUIT DRAWING SIZE A 5962-96528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits

41、2/ Unit Min Max High level input voltage VIH All 4.5 V 1, 2, 3 3.15 V M, D, P, L, R, F, G, H 3/ All 1 3.15 All 5.5 V 1, 2, 3 3.85 M, D, P, L, R, F, G, H 3/ All 1 3.85 Low level input voltage VIL All 4.5 V 1, 2, 3 1.35 V M, D, P, L, R, F, G, H 3/ All 1 1.35 All 5.5 V 1, 2, 3 1.65 M, D, P, L, R, F, G,

42、 H 3/ All 1 1.65 High level output voltage VOH For all inputs affecting output under test, VIN= VDDor VSSIOH= -100 A All 4.5 V 1, 2, 3 4.25 V M, D, P, L, R, F, G, H 3/ All 1 4.25 Low level output voltage VOL For all inputs affecting output under test, VIN= VDDor VSSIOL= 100 A All 4.5 V 1, 2, 3 0.25

43、V M, D, P, L, R, F, G, H 3/ All 1 0.25 Input current high IIH For input under test, VIN= VDDFor all other inputs, VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A M, D, P, L, R, F, G, H 3/ All 1 +1.0 Input current low IIL For input under test, VIN= VSSFor all other inputs, VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0

44、 A M, D, P, L, R, F, G, H 3/ All 1 -1.0 Output current (source) IOH4/ For output under test, VOUT= VDD - 0.4 V VIN= VDDor VSSAll 4.5 V and 5.5 V 1, 2, 3 -8.0 mA M, D, P, L, R, F, G, H 3/ All 1 -8.0 Output current (sink) IOL4/ For output under test, VOUT= 0.4 V VIN= VDDor VSSAll 4.5 V and 5.5 V 1, 2,

45、 3 8.0 mA M, D, P, L, R, F, G, H 3/ All 1 8.0 Quiescent supply current IDDQVIN= VDDor VSSAll 5.5 V 1, 2, 3 10.0 A M, D, P, L, R, F, G, H 3/ All 1 10.0 Short circuit output current IOS5/ 6/ VOUT= VDDand VSSAll 5.5 V 1, 2, 3 200 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reprodu

46、ction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ -55C TC

47、 +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max Input capacitance CINf = 1 MHz See 4.4.1c All 0.0 V 4 15.0 pF Output capacitance COUTf = 1 MHz See 4.4.1c All 0.0 V 4 15.0 pF Switching power dissipation PSW7/ CL= 50 pF, per switching output All 4.5 V and 5.5

48、V 4, 5, 6 1.8 mW/ MHz M, D, P, L, R, F, G, H 3/ All 4 1.8 Functional test 8/ VIH= 0.7 VDD, VIL= 0.3 VDD See 4.4.1b All 4.5 V and 5.5 V 7, 8 L H M, D, P, L, R, F, G, H 3/ All 7 L H Propagation delay time, An, Bn, or Cn to Yn tPLH9/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 13.0 ns M, D, P, L, R, F, G, H 3/ All 9 1.0 13.0 tPHL9/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 15.0 M, D, P, L, R, F, G, H 3/ All 9 1.0 15.0 1/ Each input/output, as applicable, shall be tested at the specified temperature, for the specified limits, to the t

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