1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 10-05-20 Charles F. Saffle REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry E. Shaw DEFENSE
2、SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Tuan D. Nguyen APPROVED BY Ray L. Monnin MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY,
3、TTL, OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS W/3-STATE OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 97-03-21 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-97549 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E157-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without l
4、icense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97549 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q a
5、nd M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the follow
6、ing example: 5962 - 97549 01 Q K X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-3
7、8535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s)
8、identify the circuit function as follows: Device type Generic number Circuit function 01 54AS575 Octal D-type edge-triggered flip- flops with 3-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class
9、 Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as des
10、ignated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or GDFP3-F24 24 Flat package L GDIP3-T24 or GDIP4-T24 24 Dual-in-line package 3 CQCC1-N28 28 Square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for d
11、evice classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97549 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 D
12、SCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) 7.0 V dc DC input voltage 7.0 V dc Voltage applied to a disabled 3-state output 5.5 V dc Storage temperature range -65/C to +150/C Operating free-air temperature range (TA) . -55/C to 125/C Maximum power dissipation (PD
13、) . 781 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175/C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) +2.0 V Maximum low level input voltage (VIL) . +0.8 V Maximum high l
14、evel output current (IOH) -12 mA Maximum low level output current (IOL) . +32 mA Case operating temperature range (TC) -55C to +125C Minimum setup time, (tS) Data before CLK 3 ns CLR$ $ $ $ $ $high or low . 6.5 ns Minimum hold time, (th) Data after CLK . 3 ns CLR$ $ $ $ $ $after CLK . 0 ns Minimum p
15、ulse duration, (tW) CLK high . 5 ns CLK low . 4 ns Maximum clock frequency, (fCLOCK) . 100 MHz 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless othe
16、rwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD
17、-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the
18、Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot fo
19、r ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97549 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of
20、 this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device cl
21、asses Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class
22、M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-
23、PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Te
24、st circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter
25、 limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part sh
26、all be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using th
27、is option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V
28、shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order
29、 to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior
30、to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A c
31、ertificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA
32、of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facil
33、ity and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 10 (see MIL-PRF-38535, appendix
34、 A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97549 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristi
35、cs. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High level output voltage VOHVCC= 4.5 V to 5.5 V, VIH= 2.0 V, VIL= 0.8 V 2/ IOH= -2 mA 1, 2, 3 VCC- 2 V OH= -12 mA 2.4 Low level output voltage VOLIOL= 32 mA 1, 2, 3 0.5 V Input clamp voltage
36、 VIKVCC= 4.5 V, II= -18 mA 1, 2, 3 -1.2 V High level input current IIHVCC= 5.5 V, VI= 2.7 V 1, 2, 3 20 A Low level input current IILVCC= 5.5 V, VI= 0.4 V Data 1, 2, 3 -3 mA OE$ $ $ $ $, CLK, CLR$ $ $ $ $ $-0.5 Input current IIVCC= 5.5 V, VI= 7 V 1, 2, 3 0.1 mA Output current IOVCC= 5.5 V, VO= 2.25 V
37、 3/ 1, 2, 3 -30 -112 mA Supply current ICCHVCC= 5.5 V Outputs high 1, 2, 3 126 mA ICCLOutputs low142 CCZOutputs disabled 142 Off-state output leakage current IOZHVCC= 5.5 V, VO= 2.7 V 1, 2, 3 50 A IOZLVCC= 5.5 V, VO= 0.4 V 1, 2, 3 -50 A Functional tests VCC= 4.5 V, 5.5 V, See 4.4.1b 7, 8 See footnot
38、es at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97549 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performanc
39、e characteristics - Continued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Clock frequency fmax VCC= 4.5 V to 5.5 V, CL= 50 pF, R1= 500 R2= 500 4/ 9, 10, 11 100 MHz Propagation delay time, CLK to any Q tPLH 9, 10, 11 3 11 ns tPHL 4 11 Outp
40、ut enable time, OE to any Q tPZH 9, 10, 11 2 7 ns tPZL 3 11 Output disable time, OE to any Q tPHZ 9, 10, 11 2 7 ns tPLZ 2 7 1/ Unused inputs that do not directly control the pin under test must be put at +2.5 V or -0.4 V. No unused inputs shall exceed 5.5 V or go less than 0.0 V. No inputs shall be
41、floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input. 3/ The output conditions have been chosen to produce a current that closely
42、 approximates one half of the true short circuit output current, IOS. Not more than one output will be tested at one time and duration of the test condition shall not exceed one second. 4/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or -0.3 V. Provided by IHS
43、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97549 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines K and L 3 Terminal number Terminal s
44、ymbol 1 CLR$ $ $ $ $ $NC 2 OE$ $ $ $ $CLR$ $ $ $ $ $3 1D OE$ $ $ $ $4 2D 1D5 3D 2D 6 4D 3D7 5D 4D 8 6D NC9 7D 5D 10 8D 6D11 NC 7D 12 GND 8D13 NC NC 14 CLK GND 15 8Q NC 16 7Q NC17 6Q CLK 18 5Q 8Q 19 4Q 7Q 20 3Q 6Q 21 2Q 5Q 22 1Q NC 23 NC 4Q 24 VCC3Q 25 2Q 26 1Q 27 NC 28 VCCFIGURE 1. Terminal connecti
45、ons. INPUTS OUTPUT OE$ $ $ $ $CLR$ $ $ $ $ $CLK D Q L L X L L H H H L H L L L H L X Q0H X H X Z FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97549 DEFENSE SUPPLY CENTER COLUMBUS COLU
46、MBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Test circuit and switching waveforms. 4/ See notes at end of FIGURE 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97549 DEFE
47、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an out
48、put with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses have the following characteristics: PRR 1 MHz, tr= tf= 2 ns, duty cycle = 50%. 4. The outputs are measured one at a time with one transition per measurement. FIGURE 3. Test circuit and switching waveforms - Continued. 4/ Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A
