1、JEDEC PUBLICATION A Procedure for Performing SWEAT JEP119A (Revision of JEP119) AUGUST 2003 (Reaffirmed: October 2012) JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors
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9、3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Publication No. 119A -i- A PROCEDURE FOR PERFORMING SWEAT CONTENTS 1 Scope 1 2 Introduction 1 3 Applicable documents 1 4 Terms and definitions 2 5 Technica
10、l requirements 5 5.1 Equipment requirements 5 5.2 General system recommendations 5 5.3 Test configuration 5 6 The SWEAT algorithm 6 6.1 Description of SWEAT 6 6.1.1 SWEAT characteristics 6 6.1.2 Example of SWEAT method 10 6.2 Explanation of SWEAT flow chart (Figure 1) 11 6.2.1 Measure the resistance
11、 at chuck temperature, RCT11 6.2.2 Convert TCR(Tref) to TCR(TCT) and measure temperature 12 6.2.3 Step increase in forcing current for initial determination of Rth12 6.2.4 Determination of initial thermal resistance and T0C13 6.2.5 Ramp up to stress conditions 13 6.2.6 Determine the thermal resistan
12、ce Rthand T0C14 6.2.7 Force the current Ifrcand delay 14 6.2.8 Measure the voltage 14 6.2.9 Compute the resistance 14 6.2.10 Compute the structure temperature 14 6.2.11 Compute estimated time to failure, tFE14 6.2.12 Compute new force current, Ifrc15 6.2.13 Determine if exit conditions are TRUE 16 6
13、.2.14 Update results, stop test 17 7 Interferences 17 7.1 Temperature gradients 17 7.2 Feedback control time and sampling 17 7.3 Control of ambient temperature 18 7.4 Four-wire kelvin test configuration 18 7.5 Initial settling time 18 7.6 Use of TCR(T) to estimate high temperatures 18 7.7 Regarding
14、the temperature dependence of the thermal resistance 22 JEDEC Publication No. 119A A PROCEDURE FOR PERFORMING SWEAT CONTENTS -ii- Tables 1 Typical stress conditions for straight AICu-Line 10 2 Resistivity of pure, bulk copper as a function of temperature (in kelvin and in degree Celsius), and the re
15、sults of a linear regression analysis 20 3 Temperature deviation associated with resistivity for pure bulk copper 21 Figures 1 The SWEAT algorithm 8 2 Determining if EXIT conditions are TRUE 9 3 tFEand stress current versus time during ramp-up 10 4 tFEand stress current versus time for a typical SWE
16、AT test result 11 5 T vs. P for an Al-metallization 22 6 T vs. P for a Cu-metallization 23 JEDEC Publication No. 119A Page 1 A PROCEDURE FOR PERFORMING SWEAT (From JEDEC Board Ballot JCB-03-07, formulated under the cognizance of the JC-14.2 Subcommittee on Wafer-Level Reliability.) 1 Scope This docu
17、ment describes an algorithm for performing the Standard Wafer Level Electromigration Accelerated Test (SWEAT) method with computer controlled instrumentation. The algorithm requires a separate iterative technique (not provided) to calculate the force current for a given target time to failure. This
18、document does not specify what test structure to use with this procedure. However, users of this algorithm report its effectiveness on both straight-lines and via-terminated test structures. Some test-structures design features are provided in JESD87 and in ASTM 1259M - 96. 2 Introduction The SWEAT
19、method is an accelerated electromigration test performed on microelectronic metallizations. This highly accelerated test was developed as a method for obtaining quickly a measure of metallization reliability and for providing process control data to the semiconductor manufacturer. This document pres
20、ents an algorithm for performing the SWEAT method with computer controlled instrumentation. The algorithm is derived from published and unpublished literature. It provides little innovation beyond what is currently documented. The intent is to provide a complete description of a basic, functional, S
21、WEAT algorithm that will facilitate software development and the use of highly accelerated stress testing. The SWEAT algorithm uses a feedback control loop to adjust the stress current applied to the metallization under test. Using Blacks equation, the stress current is adjusted such that the temper
22、ature and current density of the structure maintain the estimated time to failure within an error band of the selected target value. 3 Applicable documents Root, B. and Turner, T., Wafer Level Electromigration Tests for Production Monitoring, IEEE/International Reliability Physics Symposium, 1985, p
23、p. 100-107. Von Hagen, J., Antonin, G., Fazekas, J., Head, L., and Schafft, H., New SWEAT Method for Fast, Accurate and Stable Electromigration Testing on Wafer Level, IEEE/Integrated Reliability Workshop, Final Report, 2000, pp. 85-89. Zitzelsberger, A., Bauer, R., Von Hagen, J., Lepper, M., and Pi
24、etsch, A., Electromigration Testing on Via Line Structures with Fast Wafer Level Tests in Comparison to Standard Package Level Tests, IEEE/International Interconnect Technology Conference, Final Report, 2000, pp. 180-182. JEDEC Publication No. 119A Page 2 3 Applicable documents (contd) JEDEC Standar
25、d JESD33A, Standard Method for Measuring and Using the Temperature Coefficient of Resistance to Determine the Temperature of a Metallization Line. JEDEC Standard JESD37, Standard for Log normal Analysis of Uncensored Data, and of Singly Right-Censored Data Utilizing the Persson and Rootzen Method. J
26、EDEC Standard JESD61, Isothermal Electromigration Test Procedure. EIA/JEDEC Standard EIA/JESD63, Standard Method for Calculating the Electromigration Model Parameters for Current Density and Temperature. JEDEC Standard JESD87, Standard Test Structures for Reliability Assessment of AlCu Metallization
27、 with Barrier Materials. ASTM 1259M-96, Standard Guide for Design of Flat, Straight-Line Test Structures for Detecting Metallization Open-Circuit or Resistance-Increase Failure Due to Electromigration. 4 Terms and definitions 4.1 estimated time to failure (tFE) s The time it takes for the combined s
28、tress of temperature and current density to result in a prescribed increase in resistance of the test structure (definition of failure) as determined from Blacks equation1. aFEkTEneJAt =(1) where: A is an empirically determined constant, provided by the user J is the current density (A/cm2). n is th
29、e current density factor, provided by the user (value of 2 is often used, but larger or smaller values have been reported.) Ea is the activation energy of the metallization, provided by the user (eV). k is Boltzmanns constant (8.62E-5 eV/K), and. T is the mean temperature of the test structure (K).
30、1BLACK, S. R., Electromigration of Al-Au Alloy Films, Proc: International Reliability Physics Symposium, 1978, pp. 233-240. JEDEC Publication No. 119A Page 3 4 Terms and definitions (contd) 4.2 failure resistance criterion (RFC) The resistance at or above which the test structure is considered to ha
31、ve failed. NOTE It is equal to the product of the resistance of the test structure at the end of the initial settling period and a preselected fractional increase in resistance. 4.3 resistance at chuck temperature (RCT) The resistance of the test structure at the wafer chuck temperature, TCT, before
32、 the test structure is subjected to joule heating in accordance with the SWEAT algorithm. 4.4 chuck temperature (TCT)C The metallization temperature at the time RCT is measured; this is the temperature of the structure before joule heating. 4.5 temperature coefficient of resistance TCR(Tref) C-1 The
33、 fractional change in resistance of the test structure per unit change in temperature at a specified temperature, Tref, as described in the following equation: )(1)(TCRrefrefTRTRT=(2) NOTE For aluminum alloy metallizations, the change in resistance of the test structure with temperature is approxima
34、tely constant from room temperature to about 420 C. For copper alloy metallizations, a change in R/T becomes evident at temperatures as low as 230 C. Hence, if TCR(Tref) is to be used to calculate the temperature of copper test structure at higher temperatures, a correction factor, Fcorrwill be requ
35、ired (see 6.2.2 and 7.6). 4.6 thermal resistance (Rth) C/W The change in mean temperature of the test structure divided by the change in the power dissipation (Ifrc R(T) that causes the temperature increase in the structure. PTR=th(3) NOTE Rthis dependent on the geometry of the test structure and on
36、 the thermal conductance to the ambient, which is temperature dependent (see 7.7). In a plot of T versus P, the thermal resistance is the slope of the curve. Because the thermal conductance of the materials in the path of the heat flow from the test structure is temperature dependent, the slope will
37、 gradually change with increasing power dissipation. However, the thermal resistance can be regarded as a constant over the limited range of temperatures experienced by the test structure after the stress temperature has been attained. It is assumed that the change in resistance of the test structur
38、e due to electromigration does not, to the first order, affect its thermal resistance. JEDEC Publication No. 119A Page 4 4 Terms and definitions (contd) 4.7 target time to failure (tFT) s The desired time it should take for the resistance of the test structure to first equal or exceed the failure re
39、sistance criterion, RFC, while the structure is under stress from the SWEAT algorithm. 4.8 starting current density (JS)A/cm The current density in the narrowest region of the test structure at the initial application of the forcing current, Ifrc. NOTE The current density is calculated using area, a
40、. 4.9 forced current (Ifrc) A The current that is forced through the test structure. See 6.2.3, 6.2.5, and 6.2.7. 4.10 area (a) cm The cross-sectional area of the narrowest region of the test structure. 4.11 error band (BE)s The band centered around the target time to failure, tFT, within which the
41、SWEAT algorithm will not permit the feedback control loop to adjust the forcing current, and whose boundaries (tFT+ BEand tFT- BE) constitute the limits for the estimated time to failure, tFT, where BEis half the width of the error band EFTFEEFTBttBt +50 C?Determination of Initial Thermal Resistance
42、 R th YesNo6.2.2Ramp-upfinished ?Compute Structure Temperaturevia TCRT =(R-R CT)/(RCTTCR(T CT)+TCT) Fcorr(Tcal ) YesNo6.2.2b1 b2Phase 1: Initialisation and CharacterisationPhase 2: Ramp-up onlyPhase 3: Stress onlyPhase 2 and 3: common useJEDEC Publication No. 119A Page 9 6 The SWEAT algorithm (contd
43、) Figure 2Determining if EXIT conditions are TRUE (Explanations in section 6.2.12) from f in fig.1Continue stressloop from g to aSet RFCRFCset ?Ramp upfinished ?ERRORinside BEand Rampupfinsihed? R RFC ?Time tmax ?Ifrc Imax ?Vmeas Vmax ?Exit conditionsFALSEExit conditionsTRUEYesNoYesYesYesYesNoNoNoNo
44、NoYesContinue to Stoptest at m in fig. 1JEDEC Publication No. 119A Page 10 6.1 Description of SWEAT (contd) 6.1.2 Example of SWEAT method A typical SWEAT test method with the algorithm is illustrated in Figures 3 and 4. The parameters used in the test are listed in table 1. Table 1 Typical stress co
45、nditions for a straight AlCu-Line Parameter Value Parameter Value F = Rlast / Rlast0.10 TCT 30 C TCR(T) 0.0038 1/C Tref30 C tFT60 s a 1.2 E-8 cm BE1 s n 2 A 1.E+11 s A2/cm4Ea0.6 eV The test starts at a high value for the target time to failure. The first stress current is very low. The target value
46、is reduced as long as the estimated time to failure is outside the error band. Reaching the settling point, the target time to failure is switched to the given value, in this example 60 s. Figure 3 shows the current and the time to failure during the ramping up phase. As the test progresses, fluctua
47、tions of tFEoutside of the error band are compensated by the control loop (Figure 4). The small changes in the estimated time to failure that are shown in Figure 4 after entering the error band cannot be seen in Figure 3 because of the scale used. Finally the structure fails at 159.8 s. The stress c
48、urrent decreases continuously due to an EM induced higher resistance of the structure until the failure resistance criterion has been satisfied. During this period, the current density has decreased by 3.5 % and the temperature has increased by 1%. 0.2500.2550.2600.2650.2700.2750.2800.2850.29000.511
49、.522.533.544.55stress time (s)0200040006000800010000stress current (A)estimated time to failure (s)Figure 3 tFEand stress current versus time during ramp-up JEDEC Publication No. 119A Page 11 6.1 Description of SWEAT (contd) 6.1.2 Example of SWEAT method (contd) 0.2500.2550.2600.2650.2700.2750.2800.2850.29005010150stress time (s)5556575859606162636465stress current (A)estimated time to failure (s)Error bandFigure 4 tFEand stress current versus time for a typical SWEAT test result. 6.2 Explanation of SWEAT flow chart
