1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Update boilerplate paragraphs to current requirements. - PHN 11-04-18 David J. Corbett CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE
2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, DECADE C
3、OUNTER/DIVIDER WITH 10 DECODED OUTPUTS, MONOLITHIC SILICON YY-MM-DD 04-04-12 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04703 REV A PAGE 1 OF 14 AMSC N/A 5962-V037-11 Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236
4、 DWG NO. V62/04703 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance decade counter/divider with 10 decoded outputs microcircuit, with an operating temperature range of -40C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manu
5、facturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04703 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s)
6、. Device type Generic Circuit function 01 CD74HC4017-EP Decade counter/divider with 10 decoded outputs 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 16 MS-012 Plastic small-outlineY 16 MO-153 Plastic small-outline 1.2.3 Lea
7、d finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLU
8、MBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to +7 V 2/ Input clamp current (IIK) (VIVCC+0.5) 20 mA Output clamp current (IOK) (VOVCC+0.5) 20 mA Source or sink current per output pin (IO) (VO -0.5 or VO VCC
9、+0.5) . 25 mA Continuous current through VCCor GND . 50 mA Package thermal impedance (JA): Case outline X . 73C/W 3/ Case outline Y . 108C/W 3/ Maximum junction temperature (TJ) 150C Lead temperature (during soldering): At distance 1/16 1/32 inch (1.59 0.79 mm) from case for 10 s max. . 300C Storage
10、 temperature range (TSTG) . -65C to +150C 1.4 Recommended operating conditions. 4/ 5/ Supply voltage range (VCC) . 2 V to 6 V Minimum high level input voltage (VIH): VCC= 2 V . 1.5 V VCC= 4.5 V 3.15 V VCC= 6 V . 4.2 V Maximum low level input voltage (VIL): VCC= 2 V . 0.5 V VCC= 4.5 V 1.35 V VCC= 6 V
11、 . 1.8 V Input voltage range (VI) . 0 V to VCCOutput voltage range (VO) . 0 V to VCCInput transition (rise and fall) time (tt): VCC= 2 V . 0 to 1000 ns VCC= 4.5 V 0 to 500 ns VCC= 6 V . 0 to 400 ns Operating free-air temperature range (TA) -40C to +125C 1/ Stresses beyond those listed under “absolut
12、e maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extende
13、d periods may affect device reliability. 2/ All voltages are referenced to GND unless otherwise specified. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. 4/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. 5/ Use of this produ
14、ct beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE
15、 IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 4 2. APPLICABLE DOCUMENTS ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices JESD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these docume
16、nts are available online at http:/www.eia.org or from the Electronic Industries Alliance, Technology Strategy & Standards Department, 2500 Wilson Boulevard, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in
17、 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maxi
18、mum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The ca
19、se outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing waveforms and
20、test circuit. The timing waveforms and test circuit shall be as shown in figure 5. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VC
21、CTemperature, TADevice type Limits Unit Min Max High level output voltage VOHCMOS loads VI= VIHor VILIO= -0.02 mA 2 V 25C, -40C to 125C All 1.9 V 4.5 V 4.4 6 V 5.9 TTL loads VI= VIHor VILIO= -4 mA 4.5 V 25C 3.98 -40C to 125C 3.7 TTL loads VI= VIHor VILIO= -5.2 mA 6 V 25C 5.48 -40C to 125C 5.2 Low le
22、vel output voltage VOLCMOS loads VI= VIHor VILIO= -0.02 mA 2 V 25C, -40C to 125C 0.1 V 4.5 V 0.1 6 V 0.1 TTL loads VI= VIHor VILIO= -4 mA 4.5 V 25C 0.26 -40C to 125C 0.4 TTL loads VI= VIHor VILIO= -5.2 mA 6 V 25C 0.26 -40C to 125C 0.4 Input current IIVI= VCCor GND 6 V 25C 0.1 A -40C to 125C 1 Quiesc
23、ent supply current ICCVI= VCCor GND IO= 0 mA 6 V 25C 8 A -40C to 125C 160 Input capacitance CINCL= 50 pF 25C 10 pF -40C to 125C 10 Power dissipation capacitance Cpd2/ CL= 15 pF Input tr, tf= 6 ns 5 V 25C 39 TYP pF See footnotes at end of table. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER
24、, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Maximum clock frequency fmaxSee figure 5. 2 V 25C All 6 MHz -40C to 125C 4 4.5 V
25、25C 30 -40C to 125C 20 6 V 25C 35 -40C to 125C 23 Pulse duration twCP See figure 5. 2 V 25C 80 ns -40C to 125C 120 4.5 V 25C 16 -40C to 125C 24 6 V 25C 14 -40C to 125C 20 MR See figure 5. 2 V 25C 80 -40C to 125C 120 4.5 V 25C 16 -40C to 125C 24 6 V 25C 14 -40C to 125C 20 Setup time tsuCE to CP See f
26、igure 5. 2 V 25C 75 -40C to 125C 110 4.5 V 25C 15 -40C to 125C 22 6 V 25C 13 -40C to 125C 19 MR inactive See figure 5. 2 V 25C 5 -40C to 125C 5 4.5 V 25C 5 -40C to 125C 5 6 V 25C 5 -40C to 125C 5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted with
27、out license from IHSDEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 7 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Hold time thCE to CP See figure 5. 2 V 2
28、5C All 0 ns -40C to 125C 0 4.5 V 25C 0 -40C to 125C 0 6 V 25C 0 -40C to 125C 0 Propagation delay time, CP to Decade out tpdCL= 50 pF See figure 5. 2 V 25C 230 -40C to 125C 345 4.5 V 25C 46 -40C to 125C 69 6 V 25C 39 -40C to 125C 59 CL= 15 pF See figure 5. 5 V 25C 19 TYP Propagation delay time, CP to
29、 TC CL= 50 pF See figure 5. 2 V 25C 230 -40C to 125C 345 4.5 V 25C 46 -40C to 125C 69 6 V 25C 39 -40C to 125C 59 CL= 15 pF See figure 5. 5 V 25C 19 TYP Propagation delay time, CE to Decade out CL= 50 pF See figure 5. 2 V 25C 250 -40C to 125C 375 4.5 V 25C 50 -40C to 125C 75 6 V 25C 43 -40C to 125C 6
30、4 CL= 15 pF See figure 5. 5 V 25C 21 TYP See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHSDEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 8 TABLE I. Electrical performan
31、ce characteristics - Continued. Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Propagation delay time, CE to TC tpdCL= 50 pF See figure 5. 2 V 25C All 250 ns -40C to 125C 375 4.5 V 25C 50 -40C to 125C 75 6 V 25C 43 -40C to 125C 64 CL= 15 pF, See figure 5. 5 V 25C 21 TYP Pro
32、pagation delay time, MR to Decade out CL= 50 pF See figure 5. 2 V 25C 230 -40C to 125C 345 4.5 V 25C 46 -40C to 125C 69 6 V 25C 39 -40C to 125C 59 CL= 15 pF, See figure 5. 5 V 25C 19 TYP Propagation delay time, MR to TC CL= 50 pF See figure 5. 2 V 25C 230 -40C to 125C 345 4.5 V 25C 46 -40C to 125C 6
33、9 6 V 25C 39 -40C to 125C 59 CL= 15 pF, See figure 5. 5 V 25C 19 TYP Transition rise and fall time ttTC, Decade out CL= 50 pF 2 V 25C 75 -40C to 125C 110 4.5 V 25C 15 -40C to 125C 22 6 V 25C 13 -40C to 125C 19 Maximum frequency, CP fmasCL= 15 pF, See figure 5. 5 V 25C 60 TYP MHz 1/ Testing and other
34、 quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric test
35、ing, product performance is assured by characterization and/or design. 2/ CPDis used to determine the dynamic power consumption per package. PD= (CPDx VCC2x fi) + (CLx VCC2x fo) fi= input frequency fo= output frequency CL= output load capacitance VCC= supply voltage Provided by IHSNot for Resale-,-,
36、-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 9 Case X Dimensions Symbol Inches Millimeters Symbol Inches Millimeters Min Max Min Max Min Max Min Max A - .069 - 1.75 E .150 .157 3.81 4.00 A1 .004 .010 0.10 0.25 E1 .228 .244 5.80 6.20 b .014
37、.020 0.35 0.51 e .050 TYP 1.27 TYP c .008 NOM 0.20 NOM L .016 .044 0.40 1.12 D .386 .394 9.80 10.00 NOTES: 1. All linear dimensions are in inches (millimeters). 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed .006 in
38、ches (0.15 millimeters). 4. Falls within JEDEC MS-012. FIGURE 1. Case outlines. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 10 Case Y Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max M
39、in Max Min Max Min Max A - 1.20 - .047 E 4.30 4.50 .169 .177 A1 0.05 0.15 .002 .006 E1 6.20 6.60 .244 .260 b 0.19 0.30 .007 .012 e 0.65 TYP .026 TYP c 0.15 NOM .006 NOM L 0.50 0.75 .020 .030 D 4.90 5.10 .193 .201 NOTES: 1. All linear dimensions are in millimeters (inches). 2. This case outline is su
40、bject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed 0.15 millimeters (.006 inches). 4. Falls within JEDEC MO-153. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHSDEFENSE SUPPLY
41、 CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 11 Inputs Output State 1/ CP CE MR L X X X H X H X L X L L H L L L L No change No change 0 = H, 1-9 = L Increments counter No change No change Increments counter 1/ If n 5, TC = H, otherwise TC = L. H = High vo
42、ltage level = Transition from low to high level. L = Low voltage level = Transition from high to low level. X = Immaterial FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 RE
43、V A PAGE 12 Device type 01 Case outlines X and Y Terminal number Terminal symbol Terminal number Terminal symbol 1 5 9 2 1 10 4 3 0 11 9 4 2 12 TC 5 6 13 CE 6 7 14 CP 7 3 15 MR 8 GND 16 VCCFIGURE 4. Terminal connections. FIGURE 5. Timing waveforms and test circuit. Provided by IHSNot for Resale-,-,-
44、DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 13 Notes: 1. CLincludes probe and jig capacitance. 2. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristic
45、s: PRR 1 MHz, ZO= 50, tr 6 ns, tf 6 ns. 3. For clock inputs, fmaxis measured when the input duty cycle is 50%. 4. The outputs are measured one at a time with one input transition per measurement. 5. tPLHand tPHLare the same as tpd. FIGURE 5. Timing waveforms and test circuit - Continued. Provided by
46、 IHSNot for ResaleNo reproduction or networking permitted without license from IHSDEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04703 REV A PAGE 14 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspecti
47、on and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge
