DLA SMD-5962-08201-2009 MICROCIRCUIT DIGITAL-LINEAR 16-BIT 30 MSPS DIGITAL-TO-ANALOG CONVERTER MONOLITHIC SILICON.pdf

上传人:brainfellow396 文档编号:698407 上传时间:2019-01-02 格式:PDF 页数:16 大小:93.64KB
下载 相关 举报
DLA SMD-5962-08201-2009 MICROCIRCUIT DIGITAL-LINEAR 16-BIT 30 MSPS DIGITAL-TO-ANALOG CONVERTER MONOLITHIC SILICON.pdf_第1页
第1页 / 共16页
DLA SMD-5962-08201-2009 MICROCIRCUIT DIGITAL-LINEAR 16-BIT 30 MSPS DIGITAL-TO-ANALOG CONVERTER MONOLITHIC SILICON.pdf_第2页
第2页 / 共16页
DLA SMD-5962-08201-2009 MICROCIRCUIT DIGITAL-LINEAR 16-BIT 30 MSPS DIGITAL-TO-ANALOG CONVERTER MONOLITHIC SILICON.pdf_第3页
第3页 / 共16页
DLA SMD-5962-08201-2009 MICROCIRCUIT DIGITAL-LINEAR 16-BIT 30 MSPS DIGITAL-TO-ANALOG CONVERTER MONOLITHIC SILICON.pdf_第4页
第4页 / 共16页
DLA SMD-5962-08201-2009 MICROCIRCUIT DIGITAL-LINEAR 16-BIT 30 MSPS DIGITAL-TO-ANALOG CONVERTER MONOLITHIC SILICON.pdf_第5页
第5页 / 共16页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED REV SHET REV SHET 15 REV STATUS REV OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY RAJESH PITHADIA COLUMBUS, OHIO 43218-3990 http:/www.dscc.

2、dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY ROBERT H. HEBER AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 09-01-30 MICROCIRCUIT, DIGITAL-LINEAR, 16-BIT, 30 MSPS, DIGITAL-TO-ANALOG CONVERTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL SIZE A CAGE CODE 67

3、268 5962-08201 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E509-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 2 DSCC FORM

4、2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN

5、). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 08201 01 V Z A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2

6、.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RH

7、A levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 AD768 16-bit, 30 MSPS, digital-to-analog converter 1.2.3 Device class

8、designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-3853

9、5, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Z CDFP3-F28 28 Flat pack 1.2.5 Lead finish. The lead finish is as specified

10、 in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REV

11、ISION LEVEL SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Positive supply voltage (VDD) with respect to DCOM, REFCOM, LADCOM pins . -0.5 V to +6.0 V Negative supply voltage (VEE) with respect to DCOM, REFCOM, LADCOM pins -6.0 V to +0.5 V Analog to other grounds (REFCOM) with respect

12、 to DCOM, LADCOM pins -0.5 V to +0.5 V Digital to other grounds (DCOM) with respect to LADCOM, REFCOM pins . -0.5 V to +0.5 V Reference output (REFOUT) with respect to REFCOM pin VDD+ 0.5 V maximum Reference input current (IREFIN) . +7.5 mA maximum Digital inputs (DB0 DB15, CLOCK) with respect to DC

13、OM pin -0.5 V to VDD+ 0.5 V Analog outputs (IOUTA, IOUTB) with respect to LADCOM pin . -2.0 V to +5.0 V Maximum junction temperature (TJ) +175C Storage temperature range . -65C to +150C Lead temperature +300C Thermal resistance, junction to ambient (JA) . 50C/W Thermal resistance, junction to case (

14、JC) 10C/W 1.4 Recommended operating conditions. Positive supply voltage (VDD) +4.75 V dc to +5.25 V dc Negative supply voltage (VEE) . -5.25 V dc to -4.75 V dc Ambient operating temperature range (TA) . -55C to +125C 1.4.1 Operating performance characteristics. Output resistance (ROUT) . 1 k Output

15、capacitance (COUT) 12 pF Output propagation delay (tPD) . 17 ns Output rise time (tr) 5 ns Output fall time (tf) . 5 ns Output settling time to 0.025% (tST) 35 ns Input capacitance (CIN) . 4 pF Spurious free dynamic range within a window at 10 MSPS (SFDRW) 86 dB Spurious free dynamic range within a

16、window at 30 MSPS (SFDRW) 78 dB Spurious free dynamic range to Nyquist at 10 MSPS (SFDRN) 74 dB Spurious free dynamic range to Nyquist at 30 MSPS (SFDRN) 67 dB Total harmonic distortion at 10 MSPS (THD) -71 dB Total harmonic distortion at 30 MSPS (THD) -61 dB 1.5 Radiation features. Maximum total do

17、se available (dose rate = 50 300 rads(Si)/s) . 100 krads(Si) 2/ _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ This part may be dose rate sensitive in a space enviro

18、nment and may demonstrate enhanced low dose rate effects. Radiation end point limits for the noted parameters are guaranteed only for the conditions specified in MIL-STD-883, method 1019, condition A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

19、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-08201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of th

20、is drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL

21、-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online a

22、t http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein,

23、the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-P

24、RF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, ap

25、pendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device cla

26、ss M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.2.4 Timing diagram. The timing diagram shall be as

27、specified on figure 3. 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and posti

28、rradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test require

29、ments shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBU

30、S, OHIO 43218-3990 REVISION LEVEL SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ 3/ -55C TA+125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxResolution 4/ 5/ 4,5,6 01 16 Bits Clock rate 4/ 5/ 4,5,6 01 30 MSP

31、S DC accuracy section Integral non-linearity 6/ INL 4 01 -9 9 LSB 5 -9 10 6 -13 12 M,D,P,L,R 4 -9 9 Differential non-linearity 6/ DNL 4 01 -11 7 LSB 5 -9 8 6 -12 M,D,P,L,R 4 -11 7 Analog output section Offset error 6/ OE 1,2,3 01 -0.2 0.2 M,D,P,L,R 1 -0.2 0.2 % of FSR Gain error 6/ 7/ AE 1,2,3 01 -1

32、.0 1.0 M,D,P,L,R 1 -1.0 1.0 % of FSR Reference output section Reference voltage VREF1,2,3 01 2.475 2.525 V M,D,P,L,R 1 2.475 2.525 IOREF1,2,3 01 9.8 mA Reference output 8/ current M,D,P,L,R 1 9.8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted with

33、out license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ 2/ 3/ -55C TA+125C unless otherwise spec

34、ified Group A subgroups Device type Limits Unit Min MaxDigital inputs section Logic “1” voltage VIH1,2,3 01 3.5 V M,D,P,L,R 1 3.5 Logic “0” voltage VIL1,2,3 01 1.5 V M,D,P,L,R 1 1.5 Logic “1” current IIH1,2,3 01 -10 10 A M,D,P,L,R 1 -10 10 Logic “0” current IIL1,2,3 01 -10 10 A M,D,P,L,R 1 -10 10 In

35、put setup time tS9,10,11 01 10 ns M,D,P,L,R 9 10 Input hold time tH9,10,11 01 5 ns M,D,P,L,R 9 Latch pulse width tLPW9,10,11 01 10 ns M,D,P,L,R 9 10 Power supply section Positive supply current IDD1,2,3 01 40 mA M,D,P,L,R 1 40 Negative supply current IEE1,3 01 -73 mA 2 -75 M,D,P,L,R 1 -73 Nominal po

36、wer dissipation PD1,2,3 01 600 mW M,D,P,L,R 1 600 Power supply rejection ratio PSRR 4.75 V VDD 5.25 V, 4,6 01 -0.2 0.2 % of -5.25 V VEE -4.75 V 5 -0.25 0.2 FSR / V M,D,P,L,R 4 -0.2 0.2 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license

37、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ 2/ 3/ -55C TA+125C unless otherwise specified Group

38、 A subgroups Device type Limits Unit Min MaxAC linearity section. 9/ Spurious free dynamic range within a window SFDRWFOUT= 1.002 MHz, CLOCK = 20 MSPS 4,5,6 01 79 dB M,D,P,L,R 4 79 SFDRNFOUT= 1.002 MHz, 4,6 01 65 dB Spurious free dynamic range to Nyquist CLOCK = 20 MSPS 5 61 M,D,P,L,R 4 65 Total har

39、monic distortion THD FOUT= 1.002 MHz, 4 01 -63 dB CLOCK = 20 MSPS 5 -60 6 -62 M,D,P,L,R 4 -63 1/ Unless otherwise specified, VDD= +5.0 V, VEE= -5.0 V, LADCOM, REFCOM, and DCOM pins = 0 V, and IREFIN pin = 5 mA. 2/ RHA devices supplied to this drawing have been characterized through all levels M, D,

40、P, L, and R of irradiation. However, this device is tested only at the “R” level. Pre and Post irradiation values are identical unless otherwise specified in Table I. When performing post irradiation electrical measurements for any RHA level, TA= +25C. 3/ These parts may be dose rate sensitive in a

41、space environment and may demonstrate enhanced low dose rate effects. Radiation end point limits for the noted parameters are guaranteed only for the conditions specified in MIL-STD-883, method 1019, condition A. 4/ Not tested post irradiation. 5/ Parameter tested as part of device initial character

42、ization and after design and process changes. 6/ Measured at IOUTA and IOUTB, driving a virtual ground. 7/ Nominal full scale (FS) output current is 4 times the current at IREFIN. Therefore, nominal full scale current is 20 mA when IREFIN = 5 mA. 8/ Output current is defined as total current availab

43、le IREFIN and any external load. 9/ Measured as unbuffered voltage output (1 V range) with full scale current into 50 load on IOUTA and IOUTB. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08201 DEFENSE SUP

44、PLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outline Z Terminal number Test symbol 1 IOUTA 2 NR 3 REFOUT 4 NC 5 REFCOM 6 IREFIN 7 (LSB) DB0 8 DB1 9 DB2 10 DB3 11 DB4 12 DB5 13 DB6 14 DB7 15 DCOM 16 CLOCK 17 DB8 18 DB9 19 DB10 20 DB11

45、21 DB12 22 DB13 23 DB14 24 DB15 (MSB) 25 VDD(+5 v) 26 VEE(-5 v) 27 IOUTB 28 LADCOM FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-08201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS

46、, OHIO 43218-3990 REVISION LEVEL SHEET 9 DSCC FORM 2234 APR 97 Terminal symbol Type Pin description IOUTA Analog output Digital to analog converter (DAC) current output. Full scale current when all data bits are 1s. NR Analog input Noise reduction node. Add capacitor for noise reduction. REFOUT Anal

47、og output Reference output voltage. Nominal value is 2.5 V. NC NC No connect. Reserved for internal use. REFCOM Power Reference ground. IREFIN Analog input Reference input current. Nominal is 5 mA. DAC full scale is 4 times this current DB0 Digital input Data bits 0, least significant bit (LSB). DB1

48、 DB7 Digital input Data bits 1 - 7. DCOM Power Digital ground. CLOCK Digital input Clock input. Data latched on positive edge of clock. DB8 DB14 Digital input Data bits 8 14. DB15 Digital input Data bit 15, most significant bit (MSB). VDDP Positive supply voltage. Nominal is +5 V. VEEP Negative supply voltage, nominal is -5 V. IOUTB Analog output Complementary DAC current output. Full scale current when all data bits are 0s. LADCOM Power DAC

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1