DLA SMD-5962-91611 REV B-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS 8-BIT D FLIP-FLOP POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf
《DLA SMD-5962-91611 REV B-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS 8-BIT D FLIP-FLOP POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-91611 REV B-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS 8-BIT D FLIP-FLOP POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf(15页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make correction to figures 2 and 4. Update boilerplate jak. 00-07-18 Monica L. Poelking B Update the boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 09-03-24 Thomas M. Hess REV SHET REV SHET REV STATUS REV B B B B B B B B
2、B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kelleher CHECKED BY Thomas J. Ricciuti DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Michael A. Frye STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR U
3、SE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 91-11-01 MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 8-BIT D FLIP-FLOP, POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-91
4、611 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E200-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR
5、97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When a
6、vailable, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91611 01 M K A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead
7、finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels
8、and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT825 8-bit D flip-flop, positive edge-triggered with three-state outputs, T
9、TL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B micro
10、circuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pa
11、ck L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted
12、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.
13、5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Input clamp diode current 20 mA Output clamp diode current 20 mA DC output current. 50 mA DC VCCor GND current (per pin) . 50 mA Maximum power dissipation (PD) . 500 mW Storage temperature range (TSTG) . -65C to +15
14、0C Lead temperature (soldering, 10 seconds). +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 3/ 1.4 Recommended operating conditions. 1/ 2/ 4/ Supply voltage range (VCC) 4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage
15、range (VOUT). +0.0 V dc to VCCCase operating temperature range (TC). -55C to +125C Input rise or fall times (VCC= 4.5 V to 5.5 V) 0 to 8 ns/V Minimum setup time, data (Dn) to clock (CP) (ts1): TC= +25C, VCC = 4.5 V. 3.5 ns TC= -55C and +125C, VCC= 4.5 V 4.0 ns Minimum setup time, enable (EN) to (CP)
16、 (ts2): TC= +25C, VCC = 4.5 V. 3.5 ns TC= -55C and +125C, VCC= 4.5 V 4.0 ns Minimum hold time, Dn to CP, (th1): TC= +25C, VCC = 4.5 V. 2.5 ns TC= -55C and +125C, VCC= 4.5 V 2.5 ns Minimum hold time, EN to CP, (th2): TC= +25C, VCC = 4.5 V. 2.0 ns TC= -55C and +125C, VCC= 4.5 V 2.0 ns Minimum pulse wi
17、dth CPn high or low (tW1): TC= +25C, VCC = 4.5 V. 6.0 ns TC= -55C and +125C, VCC= 4.5 V 6.0 ns Minimum pulse width clear (CLR) low (tW2): TC= +25C, VCC = 4.5 V. 6.0 ns TC= -55C and +125C, VCC= 4.5 V 7.0 ns Minimum recovery time, CLR to CP (trec): TC= +25C, VCC = 4.5 V. 4.0 ns TC= -55C and +125C, VCC
18、= 4.5 V 4.5 ns Maximum clock frequency, (fmax): TC= +25C, VCC = 4.5 V. 95 MHz TC= -55C and +125C, VCC= 4.5 V 95 MHz 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unle
19、ss otherwise noted, all voltages are referenced to GND. 3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ Unless otherwise specified, the values listed above shall apply over the fu
20、ll VCCand TCrecommended operating range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLIC
21、ABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTME
22、NT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-
23、103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 N
24、on-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 20 - Standard for Description of
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