1、Transaction Level Modeling: An Overview,Daniel Gajski Lukai CaiCenter for Embedded Computer Systems University of California, Irvine www.cecs.uci.edu/gajski, lcai,Acknowledgement,We would like to thank transaction level team at CECS that has contributed many ideas through numerous lunch discussions:
2、,Samar AbdiRainer DoemerAndreas GerstlauerJunyu PengDongwan ShinHaobo Yu,Overview,Motivation for TLMTLM definition TLMs at different abstraction levelsTLMs for different design domainsSL methodology = model algebraConclusion,Motivation,SoC problems Increasing complexity of systems-on-chip Shorter ti
3、mes-to-market SoC solutions Higher level of abstraction transaction level modeling (TLM) IP reuse System standards TLM questions What is TLM ? How to use TLM ? This paper TLM taxonomy TLM usage,TLM Definition,TLM = Objects Computation objects + communication objectsComposition Computation objects re
4、ad/write abstract (above pin-accurate) data types through communication objectsAdvantages Object independence Each object can be modeled independently Abstraction independence Different objects can be modeled at different abstraction levels,Abstraction Models,Time granularity for communication/compu
5、tation objects can be classified into 3 basic categories. Models B, C, D and E could be classified as TLMs.,A: “Specification Model”,Objects Computation -Behaviors Communication -Variables,CompositionHierarchyOrder Sequential Parallel Piped StatesTransitions TI, TOCSynchronization Notify/Wait,B: “Co
6、mponent-Assembly Model”,Objects Computation - Proc - IPs - Memories Communication -Variable channels,CompositionHierarchyOrder Sequential Parallel Piped StatesTransitions TI, TOCSynchronization Notify/Wait,C: “Bus-Arbitration Model”,Objects Computation - Proc - IPs (Arbiters) - Memories Communicatio
7、n - Abstract bus channels,CompositionHierarchyOrder Sequential Parallel Piped StatesTransitions TI, TOCSynchronization Notify/Wait,D: “Bus-Functional Model”,Objects Computation - Proc - IPs (Arbiters) - Memories Communication - Protocol bus channels,CompositionHierarchyOrder Sequential Parallel Pipe
8、d StatesTransitions TI, TOCSynchronization Notify/Wait,E: “Cycle-Accurate Computation Model”,Objects Computation - Proc - IPs (Arbiters) - Memories - Wrappers Communication - Abstract bus channels,CompositionHierarchyOrder Sequential Parallel Piped StatesTransitions TI, TOCSynchronization Notify/Wai
9、t,F: “Implementation Model”,Objects Computation - Proc - IPs (Arbiters) - Memories Communication -Buses (wires),CompositionHierarchyOrder Sequential Parallel Piped StatesTransitions TI, TOCSynchronization Notify/Wait,Characteristics of Different Abstraction Models,Model Algebra,Algebra = ex: a * (b
10、+ c)Model = ex: Transformation t(model) is a change in objects or compositions.Model refinement is an ordered set of transformations, , such that model B = tm( ( t2( t1( model A ) ) ) )Model algebra = Methodology is a sequence of models and corresponding refinements,Model Definition,Model = Objects
11、Behaviors (representing tasks / computation / functions) Channels (representing communication between behaviors) Composition rules Sequential, parallel, pipelined, FSM Behavior composition creates hierarchy Behavior composition creates execution order Relationship between behaviors in the context of
12、 the formalism Relations amongst behaviors and channels Data transfer between channels Interface between behaviors and channels,Copyright 2003 Dan Gajski and Samar Abdi,Verify 2003,Rearrange object composition To distribute computation over components Replace objects Import library components Add /
13、Remove synchronization To correctly transform a sequential composition to parallel and vice-versa Decompose abstract data structures To implement data transaction over a bus Other transformations.,Model Transformations (Rearrange and Replace),Copyright 2003 Dan Gajski and Samar Abdi,Verify 2003,Mode
14、l Refinement,Definition Ordered set of transformations is a refinement model B = tm( ( t2( t1( model A ) ) ) ) Derives a more detailed model from an abstract one Specific sequence for each model refinement Not all sequences are relevant Equivalence verification Each transformation maintains function
15、al equivalence The refinement is thus correct by construction Refinement based system level methodology Methodology is a sequence of models and refinements,Copyright 2003 Dan Gajski and Samar Abdi,Verify 2003,Verification,Transformations preserve equivalence Same partial order of tasks Same input/ou
16、tput data for each task Same partial order of data transactions Same functionality in replacements All refined models will be “equivalent” to input model Still need to verify first model using traditional techniques Still need to verify equivalence of replacements,Refinement Tool t1 t2 tm,Model A,Mo
17、del B,Designer Decisions,Library of objects,Copyright 2003 Dan Gajski and Samar Abdi,Verify 2003,Synthesis,Set of models Sets of design tasks Profile Explore Select components / connections Map behaviors / channels Schedule behaviors/channels. Each design decision = model transformation Detailing is
18、 a sequence of design decisions Refinement is a sequence of transformations Synthesis = detailing + refinement Challenge: define the sequence of design decisions and transformations,Design Domains,SCE Experiment is Very Positive,Source: http:/www.cecs.uci.edu/cad/sce.html,Conclusion,Computation and
19、communication objects of TLM are connected through abstract data typesTLM enables modeling each component independently at different abstraction levelsThe major challenge is to define necessary and sufficient set of models for a design flowThe next major challenge is to define model algebra and corresponding methodology for each application such that algorithms and tools for modeling, verification, exploration, synthesis and test can be easily developedOpportunities are bigger than anything seen before,
